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    <title>LPC Microcontrollers中的主题 LPC4370  GPDMA Transfer problem</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4370-GPDMA-Transfer-problem/m-p/806904#M32396</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I wanted to just make some timer triggered DMA transfers, using Timer3 MAT0 as the trigger, here is my sample code, but I do not know what's going on that the timer would not make any requests into the DMA, my code for memory to memory Would works just fine. there is no DMA transaction!!!!:smileysad:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#include "LPC43xx.h" // Device header&lt;BR /&gt;#include "GPDMA_LPC43xx.h" // Keil::Device:GPDMA&lt;BR /&gt;#include "GPIO_LPC43xx.h" // Keil::Device:GPIO&lt;BR /&gt;#include "SCU_LPC43xx.h" // Keil::Device:SCU&lt;/P&gt;&lt;P&gt;uint16_t SPITXDummi[8]={0x1234,2,3,4,5,6,122,145};&lt;BR /&gt;uint16_t SPIRXDummi[8];&lt;/P&gt;&lt;P&gt;int main(void)&lt;BR /&gt;{&lt;BR /&gt; &lt;BR /&gt; /* Confige timer 3 to make request 500ms each since we use 180MHz Clock */&lt;BR /&gt; LPC_TIMER3-&amp;gt;MR0=90000000;&lt;BR /&gt; /* interrupt on MR0, reset timer on match 0 */&lt;BR /&gt; LPC_TIMER3-&amp;gt;MCR = 0x0003;&lt;BR /&gt; /* toggle MAT0.0 pin on match */&lt;BR /&gt; LPC_TIMER3-&amp;gt;EMR = 0x0031;&lt;BR /&gt; /* Reset Timer */&lt;BR /&gt; LPC_TIMER3-&amp;gt;TCR = 2;&lt;BR /&gt; &lt;BR /&gt; &lt;BR /&gt; //Select Timer3 MR0 as DMA Request&lt;BR /&gt; GPDMA_PeripheralSelect (7, 0);&lt;BR /&gt; &lt;BR /&gt; LPC_GPDMA-&amp;gt;CONFIG = 1;&lt;BR /&gt; LPC_GPDMA-&amp;gt;INTTCCLEAR = 0xFFFFFFFF;&lt;BR /&gt; LPC_GPDMA-&amp;gt;INTERRCLR = 0xFFFFFFFF;&lt;BR /&gt; /* Enable synchro logic request */&lt;BR /&gt; LPC_GPDMA-&amp;gt;SYNC = 0;&lt;/P&gt;&lt;P&gt;LPC_GPDMA-&amp;gt;C0SRCADDR = (uint32_t) &amp;amp;SPITXDummi[0];&lt;BR /&gt; LPC_GPDMA-&amp;gt;C0DESTADDR = (uint32_t)&amp;amp;LPC_TIMER3-&amp;gt;MR1;//(uint32_t) &amp;amp;SPIRXDummi[0];&lt;BR /&gt; &lt;BR /&gt; LPC_GPDMA-&amp;gt;C0LLI = 0; // linked lists for ch0&lt;BR /&gt; LPC_GPDMA-&amp;gt;C0CONTROL = 8 // transfer size (0 - 11) = 32&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 12) // source burst size (12 - 14) = 1&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 15) // destination burst size (15 - 17) = 1&lt;BR /&gt; | (2 &amp;lt;&amp;lt; 18) // source width (18 - 20) = 32 bit&lt;BR /&gt; | (2 &amp;lt;&amp;lt; 21) // destination width (21 - 23) = 32 bit&lt;BR /&gt; | (1 &amp;lt;&amp;lt; 24) // source AHB select (24) = AHB 0&lt;BR /&gt; | (1 &amp;lt;&amp;lt; 25) // destination AHB select (25) = AHB 0&lt;BR /&gt; | (1 &amp;lt;&amp;lt; 26) // source increment (26) = increment&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 27) // destination increment (27) = no increment&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 28) // mode select (28) = access in user mode&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 29) // (29) = access not bufferable&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 30) // (30) = access not cacheable&lt;BR /&gt; | (1 &amp;lt;&amp;lt; 31); // terminal count interrupt &lt;BR /&gt; &lt;BR /&gt; LPC_GPDMA-&amp;gt;C0CONFIG = 1 // channel enabled (0)&lt;BR /&gt; | (7 &amp;lt;&amp;lt; 1) // source peripheral (1 - 5) = none&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 6) // destination request peripheral (6 - 10) = MAT0.0&lt;BR /&gt; | (5 &amp;lt;&amp;lt; 11) // flow control (11 - 13) = mem to per&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 14) // (14) = mask out error interrupt&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 15) // (15) = mask out terminal count interrupt&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 16) // (16) = no locked transfers&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 18); // (27) = no HALT&lt;BR /&gt; &lt;BR /&gt; &lt;BR /&gt; /* Reset Timer */&lt;BR /&gt; LPC_TIMER3-&amp;gt;TCR = 2;&lt;BR /&gt; LPC_TIMER3-&amp;gt;TCR = 1; // enable timer&lt;BR /&gt; while (LPC_GPDMA-&amp;gt;C0CONFIG &amp;amp; 1);// wait for the DMA to finish&lt;BR /&gt; LPC_TIMER3-&amp;gt;TCR = 0; // disable timer&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; while(1)&lt;BR /&gt; {&lt;BR /&gt; &lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sun, 09 Sep 2018 14:18:46 GMT</pubDate>
    <dc:creator>aliasadzadeh</dc:creator>
    <dc:date>2018-09-09T14:18:46Z</dc:date>
    <item>
      <title>LPC4370  GPDMA Transfer problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4370-GPDMA-Transfer-problem/m-p/806904#M32396</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;I wanted to just make some timer triggered DMA transfers, using Timer3 MAT0 as the trigger, here is my sample code, but I do not know what's going on that the timer would not make any requests into the DMA, my code for memory to memory Would works just fine. there is no DMA transaction!!!!:smileysad:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;#include "LPC43xx.h" // Device header&lt;BR /&gt;#include "GPDMA_LPC43xx.h" // Keil::Device:GPDMA&lt;BR /&gt;#include "GPIO_LPC43xx.h" // Keil::Device:GPIO&lt;BR /&gt;#include "SCU_LPC43xx.h" // Keil::Device:SCU&lt;/P&gt;&lt;P&gt;uint16_t SPITXDummi[8]={0x1234,2,3,4,5,6,122,145};&lt;BR /&gt;uint16_t SPIRXDummi[8];&lt;/P&gt;&lt;P&gt;int main(void)&lt;BR /&gt;{&lt;BR /&gt; &lt;BR /&gt; /* Confige timer 3 to make request 500ms each since we use 180MHz Clock */&lt;BR /&gt; LPC_TIMER3-&amp;gt;MR0=90000000;&lt;BR /&gt; /* interrupt on MR0, reset timer on match 0 */&lt;BR /&gt; LPC_TIMER3-&amp;gt;MCR = 0x0003;&lt;BR /&gt; /* toggle MAT0.0 pin on match */&lt;BR /&gt; LPC_TIMER3-&amp;gt;EMR = 0x0031;&lt;BR /&gt; /* Reset Timer */&lt;BR /&gt; LPC_TIMER3-&amp;gt;TCR = 2;&lt;BR /&gt; &lt;BR /&gt; &lt;BR /&gt; //Select Timer3 MR0 as DMA Request&lt;BR /&gt; GPDMA_PeripheralSelect (7, 0);&lt;BR /&gt; &lt;BR /&gt; LPC_GPDMA-&amp;gt;CONFIG = 1;&lt;BR /&gt; LPC_GPDMA-&amp;gt;INTTCCLEAR = 0xFFFFFFFF;&lt;BR /&gt; LPC_GPDMA-&amp;gt;INTERRCLR = 0xFFFFFFFF;&lt;BR /&gt; /* Enable synchro logic request */&lt;BR /&gt; LPC_GPDMA-&amp;gt;SYNC = 0;&lt;/P&gt;&lt;P&gt;LPC_GPDMA-&amp;gt;C0SRCADDR = (uint32_t) &amp;amp;SPITXDummi[0];&lt;BR /&gt; LPC_GPDMA-&amp;gt;C0DESTADDR = (uint32_t)&amp;amp;LPC_TIMER3-&amp;gt;MR1;//(uint32_t) &amp;amp;SPIRXDummi[0];&lt;BR /&gt; &lt;BR /&gt; LPC_GPDMA-&amp;gt;C0LLI = 0; // linked lists for ch0&lt;BR /&gt; LPC_GPDMA-&amp;gt;C0CONTROL = 8 // transfer size (0 - 11) = 32&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 12) // source burst size (12 - 14) = 1&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 15) // destination burst size (15 - 17) = 1&lt;BR /&gt; | (2 &amp;lt;&amp;lt; 18) // source width (18 - 20) = 32 bit&lt;BR /&gt; | (2 &amp;lt;&amp;lt; 21) // destination width (21 - 23) = 32 bit&lt;BR /&gt; | (1 &amp;lt;&amp;lt; 24) // source AHB select (24) = AHB 0&lt;BR /&gt; | (1 &amp;lt;&amp;lt; 25) // destination AHB select (25) = AHB 0&lt;BR /&gt; | (1 &amp;lt;&amp;lt; 26) // source increment (26) = increment&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 27) // destination increment (27) = no increment&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 28) // mode select (28) = access in user mode&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 29) // (29) = access not bufferable&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 30) // (30) = access not cacheable&lt;BR /&gt; | (1 &amp;lt;&amp;lt; 31); // terminal count interrupt &lt;BR /&gt; &lt;BR /&gt; LPC_GPDMA-&amp;gt;C0CONFIG = 1 // channel enabled (0)&lt;BR /&gt; | (7 &amp;lt;&amp;lt; 1) // source peripheral (1 - 5) = none&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 6) // destination request peripheral (6 - 10) = MAT0.0&lt;BR /&gt; | (5 &amp;lt;&amp;lt; 11) // flow control (11 - 13) = mem to per&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 14) // (14) = mask out error interrupt&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 15) // (15) = mask out terminal count interrupt&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 16) // (16) = no locked transfers&lt;BR /&gt; | (0 &amp;lt;&amp;lt; 18); // (27) = no HALT&lt;BR /&gt; &lt;BR /&gt; &lt;BR /&gt; /* Reset Timer */&lt;BR /&gt; LPC_TIMER3-&amp;gt;TCR = 2;&lt;BR /&gt; LPC_TIMER3-&amp;gt;TCR = 1; // enable timer&lt;BR /&gt; while (LPC_GPDMA-&amp;gt;C0CONFIG &amp;amp; 1);// wait for the DMA to finish&lt;BR /&gt; LPC_TIMER3-&amp;gt;TCR = 0; // disable timer&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; while(1)&lt;BR /&gt; {&lt;BR /&gt; &lt;BR /&gt; }&lt;BR /&gt;}&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 09 Sep 2018 14:18:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4370-GPDMA-Transfer-problem/m-p/806904#M32396</guid>
      <dc:creator>aliasadzadeh</dc:creator>
      <dc:date>2018-09-09T14:18:46Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4370  GPDMA Transfer problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4370-GPDMA-Transfer-problem/m-p/806905#M32397</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN class=""&gt;&lt;STRONG&gt;&lt;A _jive_internal="true" class="" data-avatarid="-1" data-content-finding="Community" data-userid="209958" data-username="aliasadzadeh" href="https://community.nxp.com/people/aliasadzadeh"&gt;Ali Asadzadeh&lt;/A&gt;&lt;/STRONG&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/STRONG&gt;&amp;nbsp;&amp;nbsp; About the LPC4370 GPDMA memory to memory transfer which is triggered by the timer match, actually, in our lpcopen code for LPC4370, the lpcxpresso IDE version, already have a sample code about it,&amp;nbsp; it is periph_dma_timertrig, you can refer to it, please download the lpcopen code from this link:&lt;BR /&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;A class="link-titled" href="https://www.nxp.com/downloads/en/libraries/lpcopen_3_02_lpcxpresso_link2_4370.zip" title="https://www.nxp.com/downloads/en/libraries/lpcopen_3_02_lpcxpresso_link2_4370.zip"&gt;https://www.nxp.com/downloads/en/libraries/lpcopen_3_02_lpcxpresso_link2_4370.zip&lt;/A&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;&amp;nbsp;This project is using the TIMER0, MATCH0 to trigger the DMA transfer, you can test it, after it works on your side, you can change the timer to timer3 match0.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Wish it helps you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kerry&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 12 Sep 2018 07:20:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4370-GPDMA-Transfer-problem/m-p/806905#M32397</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2018-09-12T07:20:45Z</dc:date>
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