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    <title>LPC MicrocontrollersのトピックProblem with SPI SCLK</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Problem-with-SPI-SCLK/m-p/797805#M32082</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi!,&lt;/P&gt;&lt;P&gt;Firstly, I want to say hellow to everyone because it is my first question in this forum. Thank you to everyone.&lt;/P&gt;&lt;P&gt;I want to use a SPI connection with the LPC824 but the problem is that although CPOL and CPHA are set to 0, the SCLK starts at low state but then, before y send a byte, it mantains a high state.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I let you the SPI startup code below:&lt;/P&gt;&lt;P&gt;///spi&lt;BR /&gt; Init_SPI_PinMux();&lt;/P&gt;&lt;P&gt;Chip_GPIO_Init(LPC_GPIO_PORT);&lt;BR /&gt; Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT,0,PIN_psel);&lt;BR /&gt; Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT,0,PIN_busy);&lt;BR /&gt; Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT,0,PIN_irq);&lt;BR /&gt; Chip_GPIO_SetPinState(LPC_GPIO_PORT,0,PIN_psel,true);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; Chip_SPI_Init(LPC_SPI1);&lt;BR /&gt; Chip_SPI_ConfigureSPI(LPC_SPI1, SPI_MODE_MASTER | /* Enable master/Slave mode */&lt;BR /&gt; SPI_CLOCK_CPHA0_CPOL0 | /* Set Clock polarity to 0 */&lt;BR /&gt; SPI_CFG_MSB_FIRST_EN |/* Enable MSB first option */&lt;BR /&gt; SPI_CFG_SPOL_LO); /* Chipselect is active low */&lt;/P&gt;&lt;P&gt;Chip_SPI_Enable(LPC_SPI1);&lt;BR /&gt; Chip_SPI_ClearStatus(LPC_SPI1, SPI_STAT_CLR_RXOV | SPI_STAT_CLR_TXUR | SPI_STAT_CLR_SSA | SPI_STAT_CLR_SSD);&lt;BR /&gt; Chip_SPI_SetControlInfo(LPC_SPI1, 8, SPI_TXCTL_ASSERT_SSEL | SPI_TXCTL_EOF | SPI_TXCTL_RXIGNORE);&lt;BR /&gt; LPC_SPI1-&amp;gt;DIV=0;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 10 Jul 2018 06:57:41 GMT</pubDate>
    <dc:creator>smbov</dc:creator>
    <dc:date>2018-07-10T06:57:41Z</dc:date>
    <item>
      <title>Problem with SPI SCLK</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Problem-with-SPI-SCLK/m-p/797805#M32082</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi!,&lt;/P&gt;&lt;P&gt;Firstly, I want to say hellow to everyone because it is my first question in this forum. Thank you to everyone.&lt;/P&gt;&lt;P&gt;I want to use a SPI connection with the LPC824 but the problem is that although CPOL and CPHA are set to 0, the SCLK starts at low state but then, before y send a byte, it mantains a high state.&amp;nbsp;&lt;/P&gt;&lt;P&gt;I let you the SPI startup code below:&lt;/P&gt;&lt;P&gt;///spi&lt;BR /&gt; Init_SPI_PinMux();&lt;/P&gt;&lt;P&gt;Chip_GPIO_Init(LPC_GPIO_PORT);&lt;BR /&gt; Chip_GPIO_SetPinDIROutput(LPC_GPIO_PORT,0,PIN_psel);&lt;BR /&gt; Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT,0,PIN_busy);&lt;BR /&gt; Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT,0,PIN_irq);&lt;BR /&gt; Chip_GPIO_SetPinState(LPC_GPIO_PORT,0,PIN_psel,true);&lt;/P&gt;&lt;P&gt;&lt;BR /&gt; Chip_SPI_Init(LPC_SPI1);&lt;BR /&gt; Chip_SPI_ConfigureSPI(LPC_SPI1, SPI_MODE_MASTER | /* Enable master/Slave mode */&lt;BR /&gt; SPI_CLOCK_CPHA0_CPOL0 | /* Set Clock polarity to 0 */&lt;BR /&gt; SPI_CFG_MSB_FIRST_EN |/* Enable MSB first option */&lt;BR /&gt; SPI_CFG_SPOL_LO); /* Chipselect is active low */&lt;/P&gt;&lt;P&gt;Chip_SPI_Enable(LPC_SPI1);&lt;BR /&gt; Chip_SPI_ClearStatus(LPC_SPI1, SPI_STAT_CLR_RXOV | SPI_STAT_CLR_TXUR | SPI_STAT_CLR_SSA | SPI_STAT_CLR_SSD);&lt;BR /&gt; Chip_SPI_SetControlInfo(LPC_SPI1, 8, SPI_TXCTL_ASSERT_SSEL | SPI_TXCTL_EOF | SPI_TXCTL_RXIGNORE);&lt;BR /&gt; LPC_SPI1-&amp;gt;DIV=0;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Jul 2018 06:57:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Problem-with-SPI-SCLK/m-p/797805#M32082</guid>
      <dc:creator>smbov</dc:creator>
      <dc:date>2018-07-10T06:57:41Z</dc:date>
    </item>
    <item>
      <title>Re: Problem with SPI SCLK</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Problem-with-SPI-SCLK/m-p/797806#M32083</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Finally, I could found the problem. I have to set the End Of Transfer Bit before each byte transfer.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 10 Jul 2018 09:34:59 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Problem-with-SPI-SCLK/m-p/797806#M32083</guid>
      <dc:creator>smbov</dc:creator>
      <dc:date>2018-07-10T09:34:59Z</dc:date>
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