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    <title>LPC MicrocontrollersのトピックRe: Can FlexComm0 be set to UART_RXD and UART_TXD during ISP API at boot and also function as the ETM TRACE data pins when debugging?  If NOT what are my options if I must have both?</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Can-FlexComm0-be-set-to-UART-RXD-and-UART-TXD-during-ISP-API-at/m-p/795753#M32014</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have NOT found an answer to this question, but I have a new requirement which is to require the TRACE debug and USART communications to be active simultaneously.&amp;nbsp; This now makes this question no longer valid.&amp;nbsp; There was no feedback to this point, so just wanted to say I no longer need an answer here.&amp;nbsp; My solution is to move to the 208 pin LQFP package which allows for more flexibility to select TRACE pins to be different from the dedicated ISP API USART interface pins.&amp;nbsp; This solution is NOT ideal as it adds cost and development time in re-doing pin configuration on the MCU, but that's the only solution I found to this problem after adding this additional constraint.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Mon, 05 Nov 2018 12:59:33 GMT</pubDate>
    <dc:creator>matthewberberic</dc:creator>
    <dc:date>2018-11-05T12:59:33Z</dc:date>
    <item>
      <title>Can FlexComm0 be set to UART_RXD and UART_TXD during ISP API at boot and also function as the ETM TRACE data pins when debugging?  If NOT what are my options if I must have both?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Can-FlexComm0-be-set-to-UART-RXD-and-UART-TXD-during-ISP-API-at/m-p/795752#M32013</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;&lt;SPAN style="font-size: 11.0pt;"&gt;I am designing the HW for a new product using the LPC54606J512BD100 as the real-time MCU.&amp;nbsp; I am running into an issue that I hope you can help me with.&amp;nbsp; I must have the method for ISP API set as USART which when I read the chapter in the User Guide on the boot process explains that it must be Flexcomm Interface 0 and specifically PIO0_29 and PIO0_30 must be USART_RXD and USART_TXD, respectively.&amp;nbsp; I also have a requirement to rout out the ETM TRACE pins for firmware debug.&amp;nbsp; The problem is that the assigned TRACEDATA[1] and TRACEDATA[2] pins are the same pins as the ISP UART RXD and TXD pins.&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 02 Nov 2018 12:37:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Can-FlexComm0-be-set-to-UART-RXD-and-UART-TXD-during-ISP-API-at/m-p/795752#M32013</guid>
      <dc:creator>matthewberberic</dc:creator>
      <dc:date>2018-11-02T12:37:30Z</dc:date>
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    <item>
      <title>Re: Can FlexComm0 be set to UART_RXD and UART_TXD during ISP API at boot and also function as the ETM TRACE data pins when debugging?  If NOT what are my options if I must have both?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Can-FlexComm0-be-set-to-UART-RXD-and-UART-TXD-during-ISP-API-at/m-p/795753#M32014</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have NOT found an answer to this question, but I have a new requirement which is to require the TRACE debug and USART communications to be active simultaneously.&amp;nbsp; This now makes this question no longer valid.&amp;nbsp; There was no feedback to this point, so just wanted to say I no longer need an answer here.&amp;nbsp; My solution is to move to the 208 pin LQFP package which allows for more flexibility to select TRACE pins to be different from the dedicated ISP API USART interface pins.&amp;nbsp; This solution is NOT ideal as it adds cost and development time in re-doing pin configuration on the MCU, but that's the only solution I found to this problem after adding this additional constraint.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 05 Nov 2018 12:59:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Can-FlexComm0-be-set-to-UART-RXD-and-UART-TXD-during-ISP-API-at/m-p/795753#M32014</guid>
      <dc:creator>matthewberberic</dc:creator>
      <dc:date>2018-11-05T12:59:33Z</dc:date>
    </item>
    <item>
      <title>Re: Can FlexComm0 be set to UART_RXD and UART_TXD during ISP API at boot and also function as the ETM TRACE data pins when debugging?  If NOT what are my options if I must have both?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Can-FlexComm0-be-set-to-UART-RXD-and-UART-TXD-during-ISP-API-at/m-p/795754#M32015</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello Matthew Berberich,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;When you enter to ISP mode the MCU loads automatically the configurations for the pins P0_29 and P0_30 to work as UART_RX and UART_TX. Once you exit the ISP mode, in your application you can configure these pins to work with the function 5 that corresponds to TRACEDATA[2] and TRACEDATA[1]. If you enter again to the ISP mode the MCU will configure again these pins to work as a UART ISP automatically, but when you make a reset to exit ISP mode your application will load the configuration to work as the ETM TRACE pins again.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Hope it helps!&lt;/P&gt;&lt;P&gt;Victor.&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;P&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 05 Nov 2018 20:31:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Can-FlexComm0-be-set-to-UART-RXD-and-UART-TXD-during-ISP-API-at/m-p/795754#M32015</guid>
      <dc:creator>victorjimenez</dc:creator>
      <dc:date>2018-11-05T20:31:03Z</dc:date>
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