topic Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash in LPC Microcontrollers

IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

alankilian1 — Thu, 07 Dec 2017 20:10:14 GMT

I am having an issue with the flash downloader .mac file for the LPCXpresso54608 Eval board.

I get an error when trying to download using J-Link/J-Trace and a flash loader.

The error message is:

C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0_2\arm\config\flashloader\NXP\FlashLPC546x_SPIFI.mac(39,27): Error: Operation error.

Looking at the debugger log (attached) I can see that every operation after setting the main clock returns 0xFFFFFFFF

(line 1375 is where the main clock is set, and it's all 0xFFFFFF after that.)

Line 1375:

T157C 006:181 JLINK_BeginDownload(Flags = 0x01) (0000ms, 4225ms total)
T157C 006:181 JLINK_WriteMem(0x40000280, 0x0004 Bytes, ...) - Data: 03 00 00 00 -- CPU_WriteMem(4 bytes @ 0x40000280) returns 0x04 (0101ms, 4326ms total)
T157C 006:283 JLINK_EndDownload() returns 0x00 (0000ms, 4326ms total)
T157C 006:283 JLINK_BeginDownload(Flags = 0x01) (0000ms, 4326ms total)
T157C 006:283 JLINK_WriteMem(0x400002A0, 0x0004 Bytes, ...) - Data: 00 00 00 00 -- CPU_WriteMem(4 bytes @ 0x400002A0) returns 0xFFFFFFFF (0201ms, 4527ms total)
T157C 006:484 JLINK_EndDownload() returns 0x00 (0000ms, 4527ms total)
T157C 006:485 JLINK_BeginDownload(Flags = 0x01) (0000ms, 4527ms total)

In the FlashLPC546x_SPIFI.mac file, lines 20,21 are:

/*MAINCLKSELA[1:0] = 0b11 == fro_hf*/
__writeMemory32(0x00000003, 0x40000280, "Memory");

Commenting-out the setting of the main clock allows me to download and debug correctly.

What would be the correct way to correct this error?

I don't think it's a good idea to edit an IAR system file, although I could make a copy and check it in with my project.

If I uncheck the "Use Flash Loader" box, I can download and debug just fine also.

I've installed the latest IAR release.

I've updated the LPCXpresso board with the latest drivers, firmware and scripts:

LPCScrypt v1.8.2_723
LPC drivers v2.0.2
J-Link v6.16e beta

Any help would be welcome.

-Alan

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

jeremyzhou — Mon, 11 Dec 2017 02:35:47 GMT

Hi Alan Kilian ,

Thank you for your interest in NXP Semiconductor products and 

for the opportunity to serve you.

I was wondering if you can describe how to replicate the issue and upload the sample code.

Have a great day.
TIC
 
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Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

brendonslade — Mon, 11 Dec 2017 18:21:25 GMT

Hi Alan,

looks like you are using a slightly older version of EWARM. I suggest updating to version 8.20. There were some issues in earlier versions when it comes to flash programming.

regards,

Brendon

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

alankilian1 — Mon, 11 Dec 2017 18:52:19 GMT

I have tried using the latest IAR version and there is no change.

Start with the hello_world example in the SDK.

Place part of the executable in QSPI flash using the attached linker control file.

Download (the download will fail)

---------- LPC54608J512_flash ------------------

/*
** ###################################################################
** Processors: LPC54608J512BD208
** LPC54608J512ET180
**
** Compiler: IAR ANSI C/C++ Compiler for ARM
** Reference manual: LPC546xx User manual Rev.1.9 5 June 2017
** Version: rev. 1.2, 2017-06-08
** Build: b170821
**
** Abstract:
** Linker file for the IAR ANSI C/C++ Compiler for ARM
**
** Copyright 2016 Freescale Semiconductor, Inc.
** Copyright 2016-2017 NXP
** Redistribution and use in source and binary forms, with or without modification,
** are permitted provided that the following conditions are met:
**
** 1. Redistributions of source code must retain the above copyright notice, this list
** of conditions and the following disclaimer.
**
** 2. Redistributions in binary form must reproduce the above copyright notice, this
** list of conditions and the following disclaimer in the documentation and/or
** other materials provided with the distribution.
**
** 3. Neither the name of the copyright holder nor the names of its
** contributors may be used to endorse or promote products derived from this
** software without specific prior written permission.
**
** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
** ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
** WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
** ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
** (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
** LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
** ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
** (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
** SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
**
** http: www.nxp.com
** mail: support@nxp.com
**
** ###################################################################
*/

define symbol m_interrupts_start = 0x00000000;
define symbol m_interrupts_end = 0x000003FF;

define symbol m_text_start = 0x00000400;
define symbol m_text_end = 0x0007FFFF;

define symbol qspi_flash_data_start = 0x10000000;
define symbol qspi_flash_data_end = 0x10FFFFFF;

define symbol m_data_start = 0x20000000;
define symbol m_data_end = 0x20027FFF;

define symbol m_usb_sram_start = 0x40100000;
define symbol m_usb_sram_end = 0x40101FFF;

/* USB BDT size */
define symbol usb_bdt_size = 0x0;
/* Sizes */
if (isdefinedsymbol(__stack_size__)) {
define symbol __size_cstack__ = __stack_size__;
} else {
define symbol __size_cstack__ = 0x0400;
}

if (isdefinedsymbol(__heap_size__)) {
define symbol __size_heap__ = __heap_size__;
} else {
define symbol __size_heap__ = 0x0400;
}

define memory mem with size = 4G;
define region TEXT_region = mem:[from m_interrupts_start to m_interrupts_end]
| mem:[from m_text_start to m_text_end];
define region DATA_region = mem:[from m_data_start to m_data_end-__size_cstack__];
define region CSTACK_region = mem:[from m_data_end-__size_cstack__+1 to m_data_end];
define region QSPI_FLASH_region = mem:[from qspi_flash_data_start to qspi_flash_data_end];

define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
define block RW { readwrite };
define block ZI { zi };

/* regions for USB */
define region USB_BDT_region = mem:[from m_usb_sram_start to m_usb_sram_start + usb_bdt_size - 1];
define region USB_SRAM_region = mem:[from m_usb_sram_start + usb_bdt_size to m_usb_sram_end];
place in USB_BDT_region { section m_usb_bdt };
place in USB_SRAM_region { section m_usb_global };

initialize by copy { readwrite, section .textrw };

if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
{
/* Required in a multi-threaded application */
initialize by copy with packing = none { section __DLIB_PERTHREAD };
}

do not initialize { section .noinit, section m_usb_bdt, section m_usb_global };

place at address mem: m_interrupts_start { readonly section .intvec };
place in TEXT_region { readonly };
place in DATA_region { block RW };
place in DATA_region { block ZI };
place in DATA_region { last block HEAP };
place in CSTACK_region { block CSTACK };
place in QSPI_FLASH_region { readonly section * object hello_world.o };

----------------------------------------------------------

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

jeremyzhou — Tue, 12 Dec 2017 07:30:09 GMT

Hi Alan Kilian,

Thanks for your reply, you can upload the code and I'll give a try.

Have a great day.
TIC
 
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Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

alankilian1 — Tue, 12 Dec 2017 12:12:43 GMT

Start with the hello_world example in the SDK.

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

alankilian1 — Fri, 15 Dec 2017 13:46:47 GMT

Is there any update on this?

CES is just around the corner.

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

jeremyzhou — Mon, 18 Dec 2017 02:33:29 GMT

Hi Alan Kilian,,

Thanks for your reply.

The LPC5460x doesn't support boot from the QSPI flash, so the user can't program the whole demo image to the external flash, only partial code is available.

So I was wondering if you can describe the whole programing process which would contains adapt linker file, change flash loader file,etc. Then I can replicate the phenomenon and I'm looking forward to your reply.

Have a great day.
TIC
 
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Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

alankilian1 — Mon, 18 Dec 2017 14:05:33 GMT

Sure Jeremy I'll describe more.

When I said in an earlier message:

"Start with the hello_world example in the SDK.

Place part of the executable in QSPI flash using the attached linker control file.

Download (the download will fail)"

I meant start with the hello_world example in the SDK.

Compile it, download it and verify it runs.

Then edit the linker control file and make the one-line change as I showed you in my note.

Then, recompile, attempt to download and you will see that when the downloader launches the FlashLPC546x_SPIFI.mac file, that it will display an error message described in my first post.

If you then edit the FlashLPC546x_SPIFI.mac as shown in my first post, the download will complete.

I understand that I cannot execute out of the SPIFI. This is just the simplest demonstration I could find to cause the SPIFI flash loader to run and make it as easy as possible for you to demonstrate the error.

If you need additional instruction on how to use the IAR IDE, connect your board, load USB device drivers or anything, don't hesitate to post again and I'll walk you through those processes.

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

jeremyzhou — Tue, 19 Dec 2017 09:46:06 GMT

Hi Alan Kilian,

Thanks for reply.

Sorry, I'm still a bit confused.

According to your statement, you've programmed a part of hello_world example to SPIFI flash successful via adapting the linker file and flash loader file, is it right?

I see the modified linker file in the previous reply, however I don't find the modified flash loader file and I was wondering if you can upload the modified hello_world.c, then I can replicate the programing process on site.

TIC
 
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Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

alankilian1 — Tue, 19 Dec 2017 13:32:30 GMT

All of this information is in my very first post.

The information about how to modify the flash loader macros file is as follows:

In the FlashLPC546x_SPIFI.mac file, lines 20,21 are:

/*MAINCLKSELA[1:0] = 0b11 == fro_hf*/
__writeMemory32(0x00000003, 0x40000280, "Memory");

Commenting-out the setting of the main clock allows me to download and debug correctly.

I am using an unmodified hello worlds example except for the changes I posted earlier in the modified linker file.

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

jeremyzhou — Wed, 20 Dec 2017 09:37:30 GMT

Hi Alan Kilian,

Thanks for your sharing, and I'll give a try.

TIC
 
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Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

jeremyzhou — Mon, 02 Nov 2020 14:07:44 GMT

Hi Alan Kilian，

Please trying the following steps to plus the FlashLPC546x_SPIFI.flash.

And the adapted linker file is below:

/*###ICF### Section handled by ICF editor, don't touch! ****/
/*-Editor annotation file-*/
/* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_1.xml" */
/*-Specials-*/
define symbol __ICFEDIT_intvec_start__ = 0x00000000;
/*-Memory Regions-*/
define symbol __ICFEDIT_region_IROM1_start__ = 0x00000000;
define symbol __ICFEDIT_region_IROM1_end__   = 0x0007FFFF;
define symbol __ICFEDIT_region_IROM2_start__ = 0x10000000;
define symbol __ICFEDIT_region_IROM2_end__   = 0x17FFFFFF;
define symbol __ICFEDIT_region_EROM1_start__ = 0x0;
define symbol __ICFEDIT_region_EROM1_end__   = 0x0;
define symbol __ICFEDIT_region_EROM2_start__ = 0x0;
define symbol __ICFEDIT_region_EROM2_end__   = 0x0;
define symbol __ICFEDIT_region_EROM3_start__ = 0x0;
define symbol __ICFEDIT_region_EROM3_end__   = 0x0;
define symbol __ICFEDIT_region_IRAM1_start__ = 0x20000000;
define symbol __ICFEDIT_region_IRAM1_end__   = 0x2000FFFF;
define symbol __ICFEDIT_region_IRAM2_start__ = 0x20010000;
define symbol __ICFEDIT_region_IRAM2_end__   = 0x20017FFF;
define symbol __ICFEDIT_region_IRAM3_start__ = 0x20018000;
define symbol __ICFEDIT_region_IRAM3_end__   = 0x2001FFFF;
define symbol __ICFEDIT_region_IRAM4_start__ = 0x20020000;
define symbol __ICFEDIT_region_IRAM4_end__   = 0x20027FFF;
define symbol __ICFEDIT_region_ERAM1_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM1_end__   = 0x0;
define symbol __ICFEDIT_region_ERAM2_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM2_end__   = 0x0;
define symbol __ICFEDIT_region_ERAM3_start__ = 0x0;
define symbol __ICFEDIT_region_ERAM3_end__   = 0x0;
/*-Sizes-*/
define symbol __ICFEDIT_size_cstack__ = 0x400;
define symbol __ICFEDIT_size_heap__   = 0x800;
/**** End of ICF editor section. ###ICF###*/


/* SRAMX */
define symbol __SRAMX_start       = 0x04000000;
define symbol __SRAMX_end         = 0x04007FFF;

define memory mem with size = 4G;
define region IROM_region   =   mem:[from __ICFEDIT_region_IROM1_start__ to __ICFEDIT_region_IROM1_end__]
                              | mem:[from __ICFEDIT_region_IROM2_start__ to __ICFEDIT_region_IROM2_end__];
define region EROM_region   =   mem:[from __ICFEDIT_region_EROM1_start__ to __ICFEDIT_region_EROM1_end__]
                              | mem:[from __ICFEDIT_region_EROM2_start__ to __ICFEDIT_region_EROM2_end__]
                              | mem:[from __ICFEDIT_region_EROM3_start__ to __ICFEDIT_region_EROM3_end__];
define region IRAM_region   =   mem:[from __ICFEDIT_region_IRAM1_start__ to __ICFEDIT_region_IRAM1_end__]
                              | mem:[from __ICFEDIT_region_IRAM2_start__ to __ICFEDIT_region_IRAM2_end__]
                              | mem:[from __ICFEDIT_region_IRAM3_start__ to __ICFEDIT_region_IRAM3_end__]
                              | mem:[from __ICFEDIT_region_IRAM4_start__ to __ICFEDIT_region_IRAM4_end__];
define region SRAMX_region  =   mem:[from __SRAMX_start to __SRAMX_end                                  ];
define region ERAM_region   =   mem:[from __ICFEDIT_region_ERAM1_start__ to __ICFEDIT_region_ERAM1_end__]
                              | mem:[from __ICFEDIT_region_ERAM2_start__ to __ICFEDIT_region_ERAM2_end__]
                              | mem:[from __ICFEDIT_region_ERAM3_start__ to __ICFEDIT_region_ERAM3_end__];


define block CSTACK    with alignment = 8, size = __ICFEDIT_size_cstack__   { };
define block HEAP      with alignment = 8, size = __ICFEDIT_size_heap__     { };

initialize by copy { readwrite };

if (isdefinedsymbol(__USE_DLIB_PERTHREAD))
{
  // Required in a multi-threaded application
  initialize by copy with packing = none { section __DLIB_PERTHREAD };
}

do not initialize  { section .noinit };

place at address mem:__ICFEDIT_intvec_start__ { readonly section .intvec };

place in IROM_region  { readonly };
place in EROM_region  { readonly section application_specific_ro };
place in SRAMX_region { block CSTACK, block HEAP };
place in IRAM_region  { readwrite };
place in ERAM_region  { readwrite section application_specific_rw };‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

TIC
 
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Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

alankilian1 — Thu, 21 Dec 2017 14:20:28 GMT

Thanks for the information, but it does not solve the problem.

In your example, you are likely not loading anything into the SPIFI because all your code fits in the internal FLASH and therefore are not calling the SPIFI FLASH loader.

Make the following two changes to your example, and you should see the SPIFI FLASH loader fail:

1) Make a large constant array:

static const uint32_t array[128*1024] = {1};

This is a 512 kilobyte array that will be placed in the readonly section.

2) Reference the array so it doesn't get optimized out:

PRINTF("%d\n",array[0]);

Build, and you should see the array being placed in the external SPIFI chip:

hello_world.map:

array 0x10000000 0x80000 Data Lc hello_world.o [1]

If you make these changes, some data will be placed in the external chip, and the FLASH loader will fail.

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

jeremyzhou — Mon, 02 Nov 2020 14:07:47 GMT

Hi Alan Kilian,

Thanks for your reply.

I can program the array to the SPIFI flash when I declare the array likes this.

/*******************************************************************************
 * Definitions
 ******************************************************************************/
#pragma location =0x10000000
__root const char SPIFI_config[] = 
{
0x0,0x1,0x2,0x3,0x4,0x5,0x6,0x7,0x8,0x9,0xA,0xB,0xC,0xD,0xE,0xF,
0x10,0x11,0x12,0x13,0x14,0x15,0x16,0x17,0x18,0x19,0x1A,0x1B,0x1C,0x1D,0x1E,0x1F,
0x20,0x21,0x22,0x23,0x24,0x25,0x26,0x27,0x28,0x29,0x2A,0x2B,0x2C,0x2D,0x2E,0x2F,
0x30,0x31,0x32,0x33,0x34,0x35,0x36,0x37,0x38,0x39,0x3A,0x3B,0x3C,0x3D,0x3E,0x3F,
0x40,0x41,0x42,0x43,0x44,0x45,0x46,0x47,0x48,0x49,0x4A,0x4B,0x4C,0x4D,0x4E,0x4F,
0x50,0x51,0x52,0x53,0x54,0x55,0x56,0x57,0x58,0x59,0x5A,0x5B,0x5C,0x5D,0x5E,0x5F,
0x60,0x61,0x62,0x63,0x64,0x65,0x66,0x67,0x68,0x69,0x6A,0x6B,0x6C,0x6D,0x6E,0x6F,
0x70,0x71,0x72,0x73,0x74,0x75,0x76,0x77,0x78,0x79,0x7A,0x7B,0x7C,0x7D,0x7E,0x7F,
0x80,0x81,0x82,0x83,0x84,0x85,0x86,0x87,0x88,0x89,0x8A,0x8B,0x8C,0x8D,0x8E,0x8F,
0x90,0x91,0x92,0x93,0x94,0x95,0x96,0x97,0x98,0x99,0x9A,0x9B,0x9C,0x9D,0x9E,0x9F,
0xA0,0xA1,0xA2,0xA3,0xA4,0xA5,0xA6,0xA7,0xA8,0xA9,0xAA,0xAB,0xAC,0xAD,0xAE,0xAF,
0xB0,0xB1,0xB2,0xB3,0xB4,0xB5,0xB6,0xB7,0xB8,0xB9,0xBA,0xBB,0xBC,0xBD,0xBE,0xBF,
0xC0,0xC1,0xC2,0xC3,0xC4,0xC5,0xC6,0xC7,0xC8,0xC9,0xCA,0xCB,0xCC,0xCD,0xCE,0xCF,
0xD0,0xD1,0xD2,0xD3,0xD4,0xD5,0xD6,0xD7,0xD8,0xD9,0xDA,0xDB,0xDC,0xDD,0xDE,0xDF,
0xE0,0xE1,0xE2,0xE3,0xE4,0xE5,0xE6,0xE7,0xE8,0xE9,0xEA,0xEB,0xEC,0xED,0xEE,0xEF,
0xF0,0xF1,0xF2,0xF3,0xF4,0xF5,0xF6,0xF7,0xF8,0xF9,0xFA,0xFB,0xFC,0xFD,0xFE,0xFF
};‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

And my IAR version is 8.11.3
TIC
 
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Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

alankilian1 — Fri, 22 Dec 2017 15:21:08 GMT

On December 11, Brndon said I needed to be using the latest IAR version, which I am using.

Hi Alan,
looks like you are using a slightly older version of EWARM. I suggest updating to version 8.20. There were some issues in earlier versions when it comes to flash programming.

regards,
Brendon

Using YOUR version 8.11.3 and your modifications to main.c, I get a FLASH validation error:

Fri Dec 22, 2017 10:19:04: IAR Embedded Workbench 8.11.3 (C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\bin\armproc.dll)
Fri Dec 22, 2017 10:19:04: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\debugger\NXP\LPC5460x.dmac
Fri Dec 22, 2017 10:19:04: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\NXP\FlashNXPLPC5460xM4F.mac
Fri Dec 22, 2017 10:19:04: Loading the CMSIS-DAP driver
Fri Dec 22, 2017 10:19:04: Probe: CMSIS-DAP probe SW module ver 1.12
Fri Dec 22, 2017 10:19:04: Probe: CMSIS-DAP S/N 'KRAWAQBR' mapped to a number 38802.
Fri Dec 22, 2017 10:19:04: Emulation layer version 4.23
Fri Dec 22, 2017 10:19:04: Notification to core-connect hookup.
Fri Dec 22, 2017 10:19:04: Probe: ConnectSpec='LPC-LINK2 CMSIS-DAP V5.182:KRAWAQBR:7-150EAA10-0-0000'.
Fri Dec 22, 2017 10:19:05: Connecting to TAP#0 DAP AHB-AP-CM port 0 (IDR=0x24770011).
Fri Dec 22, 2017 10:19:05: Recognized CPUID=0x410fc241 Cortex-M4 r0p1 arch ARMv7-M
Fri Dec 22, 2017 10:19:05: Debug resources: 6 instruction comparators, 4 data watchpoints.
Fri Dec 22, 2017 10:19:05: CPU status OK
Fri Dec 22, 2017 10:19:05: MultiCore: Asynchronous core execution FORCED.
Fri Dec 22, 2017 10:19:05: MultiCore: Synchronous core execution DISABLED.
Fri Dec 22, 2017 10:19:05: LowLevelReset(script, delay 200)
Fri Dec 22, 2017 10:19:05: Calling reset script: ResetAndStopAtUser
Fri Dec 22, 2017 10:19:05: Reset and stop after bootloader
Fri Dec 22, 2017 10:19:06: Notification to init-after-hw-reset hookup.
Fri Dec 22, 2017 10:19:06: Probe: ConnectSpec='LPC-LINK2 CMSIS-DAP V5.182:KRAWAQBR:7-150EAA10-0-0000'.
Fri Dec 22, 2017 10:19:06: Connecting to TAP#0 DAP AHB-AP-CM port 0 (IDR=0x24770011).
Fri Dec 22, 2017 10:19:06: Recognized CPUID=0x410fc241 Cortex-M4 r0p1 arch ARMv7-M
Fri Dec 22, 2017 10:19:06: Debug resources: 6 instruction comparators, 4 data watchpoints.
Fri Dec 22, 2017 10:19:06: --- TARGET CPU CLOCK SET TO 12MHz ---
Fri Dec 22, 2017 10:19:07: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\NXP\FlashNXPLPC5411xM4FRAM128K.out
Fri Dec 22, 2017 10:19:07: Target reset
Fri Dec 22, 2017 10:19:08: --- RESTORING TARGET CPU CLOCK ---
Fri Dec 22, 2017 10:19:08: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\NXP\FlashNXPLPC5460xM4F.mac
Fri Dec 22, 2017 10:19:08: Loaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\NXP\FlashLPC546x_SPIFI.mac
Fri Dec 22, 2017 10:19:08: ----- execUserFlashInit -----
Fri Dec 22, 2017 10:19:08: Loaded debugee: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\NXP\FlashLPC546x_SPIFI.out
Fri Dec 22, 2017 10:19:08: Target reset
Fri Dec 22, 2017 10:19:09: Unloaded macro file: C:\Program Files (x86)\IAR Systems\Embedded Workbench 8.0\arm\config\flashloader\NXP\FlashLPC546x_SPIFI.mac
Fri Dec 22, 2017 10:19:09: Downloaded C:\Users\xakilian\Downloads\SDK_2.3.0_LPCXpresso54608\boards\lpcxpresso54608\demo_apps\hello_world\iar\debug\hello_world.out to flash memory.
Fri Dec 22, 2017 10:19:09: Reset and stop after bootloader
Fri Dec 22, 2017 10:19:10: Map flash at address 0x0
Fri Dec 22, 2017 10:19:11: Loaded debugee: C:\Users\xakilian\Downloads\SDK_2.3.0_LPCXpresso54608\boards\lpcxpresso54608\demo_apps\hello_world\iar\debug\hello_world.out
Fri Dec 22, 2017 10:19:11: LowLevelReset(software, delay 200)
Fri Dec 22, 2017 10:19:11: LowLevelReset(software, delay 200)
Fri Dec 22, 2017 10:19:11: LowLevelReset(script, delay 200)
Fri Dec 22, 2017 10:19:11: Calling reset script: ResetAndStopAtUser
Fri Dec 22, 2017 10:19:11: Notification to init-after-hw-reset hookup.
Fri Dec 22, 2017 10:19:11: Probe: ConnectSpec='LPC-LINK2 CMSIS-DAP V5.182:KRAWAQBR:7-150EAA10-0-0000'.
Fri Dec 22, 2017 10:19:11: Connecting to TAP#0 DAP AHB-AP-CM port 0 (IDR=0x24770011).
Fri Dec 22, 2017 10:19:11: Recognized CPUID=0x410fc241 Cortex-M4 r0p1 arch ARMv7-M
Fri Dec 22, 2017 10:19:11: Debug resources: 6 instruction comparators, 4 data watchpoints.
Fri Dec 22, 2017 10:19:11: Verification error at 0x10000001: mem = 0x00, file = 0x01
Fri Dec 22, 2017 10:19:11: Download completed but verification failed.
Fri Dec 22, 2017 10:19:11: LowLevelReset(software, delay 200)
Fri Dec 22, 2017 10:19:11: Target reset
Fri Dec 22, 2017 10:19:11: INFO: Configuring trace using 'SWO,ETB' setting ...
Fri Dec 22, 2017 10:19:11: Probe: ConnectSpec='LPC-LINK2 CMSIS-DAP V5.182:KRAWAQBR:7-150EAA10-0-0000'.
Fri Dec 22, 2017 10:19:11: Trace: Using detected ETMv3CM at address 0xe0041000
Fri Dec 22, 2017 10:19:11: Trace: Access to detected ETMv3CM(architecture=3.5) initialized (CONF=0x8c842000, CTRL=0xc10, IDR=0x4114f250)
Fri Dec 22, 2017 10:19:11: Probe: ConnectSpec='LPC-LINK2 CMSIS-DAP V5.182:KRAWAQBR:7-150EAA10-0-0000'.
Fri Dec 22, 2017 10:19:11: INFO: SWO trace mode is not supported by the probe (use I-jet/I-jet-Trace probe) - trace is disabled.
Fri Dec 22, 2017 10:19:11: MultiCore: Synchronous core execution DISABLED.
Fri Dec 22, 2017 10:19:11: There were 1 error and 1 warning during the initialization of the debugging session.

Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

jeremyzhou — Wed, 27 Dec 2017 02:49:37 GMT

Hi Alan Kilian,

Thanks for your reply.

Did you modify the FlashLPC546x_SPIFI.mac or do any other operations, meanwhile, carrying out my method?

TIC

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Re: IAR EWARM Failed to load FlashLPC546x_SPIFI.flash

frédéricriviere — Fri, 05 Jan 2018 16:55:46 GMT

Hi,

I confirm that commenting out the memory access described by alankilian1 allow me to successfully flash QSPI using IAR + J-Link (tested on both IAR 7.80.4 and IAR 8.11.1).

In order to simplify the steps to reproduce, here is what I have done

Open "hello_world.eww" from official SDK 2.30
In project options, configure debugger to J-Link/J-Trace (defaults to CMSIS DAP)
Go to Project > Download > Download File...
Select the attached 'BLUE-OM13092-PQ9Y4-1.3.5_s.out' file and click on Open
Got 'traceKO.txt'
Applied Alan suggested fix
Got 'traceOK.txt'. Flashing is successful. Reset the board and check the demo is starting.

What are the next steps ? Someone has to investigate that on NXP side. Thanks.