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    <title>LPC Microcontrollers中的主题 Re: lpcxx address at reset</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769045#M30948</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV style="left: 210px;"&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV class="" style="top: 0px;"&gt;&lt;DIV class="" style="left: 407px; top: 0px;"&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV style="width: 100%;"&gt;&lt;TABLE border="0" cellpadding="0" cellspacing="0" style="margin: 0px; padding: 0px; width: 100%; background-color: white;" width="100%"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD style="padding: 20px;"&gt;&lt;TABLE border="0" cellpadding="0" cellspacing="0" style="width: 100%;" width="100%"&gt;&lt;TBODY&gt;&lt;TR style="height: 117px;"&gt;&lt;TD style="padding: 10px 0px 20px; height: 117px;" valign="middle"&gt;&lt;P&gt;Con Verse &lt;SPAN class="" lang="en"&gt;&lt;SPAN class=""&gt;answered me saying:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;ARM processors are different. Address 0x0 contains the initial value to load into the stack pointer (SP), and address 0x4 contains the initial value to put into the PC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&lt;SPAN class="" lang="en"&gt;&lt;SPAN class=""&gt;both at address 0 and at address 4 I have 0xe59ff018.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="" lang="en"&gt;&lt;SPAN class=""&gt;but the PC go at address 0x8d4 after esecution of address 0x0..&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Sat, 19 May 2018 14:30:39 GMT</pubDate>
    <dc:creator>thieulam</dc:creator>
    <dc:date>2018-05-19T14:30:39Z</dc:date>
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      <title>lpcxx address at reset</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769044#M30947</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello everyone. I am a new user of the NXP chips (coming from the PICs). I have doubts about what happens at the reset. In the pics on reset, the flash memory instruction is executed at address 0x0:&lt;/P&gt;&lt;P&gt;Line Address Opcode Label Disassembly&lt;/P&gt;&lt;P&gt;1 00000 040200 goto _reset&lt;/P&gt;&lt;P&gt;2 00002 000000 nop&lt;/P&gt;&lt;P&gt;3 00004 0029FC _DefaultInterrupt&lt;/P&gt;&lt;P&gt;4 00006 0029FC _DefaultInterrupt&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Does the same thing happen in the lpc24xx chips? Reading the manual would seem so, but I can not figure out if the address 0x0 is related to the flash memory (lpc2468):&lt;/P&gt;&lt;P&gt;Disassembly&lt;/P&gt;&lt;P&gt;0x0: 0x18 DC8 24; '.'&lt;/P&gt;&lt;P&gt;Region $$ Table $$ Base:&lt;/P&gt;&lt;P&gt;Region $$ Table $$ Limit:&lt;/P&gt;&lt;P&gt;__vector:&lt;/P&gt;&lt;P&gt;0x1: 0xf0 DC8 240; '.'&lt;/P&gt;&lt;P&gt;0x2: 0xe59f DC16 58783; '..'&lt;/P&gt;&lt;P&gt;0x4: 0xe59ff018 PC LDR, [PC, # 0x18]; Abort_Handler&lt;/P&gt;&lt;P&gt;0x8: 0xe59ff018 PC LDR, [PC, # 0x18]; Abort_Handler&lt;/P&gt;&lt;P&gt;0xc: 0xe59ff018 PC LDR, [PC, # 0x18]; Abort_Handler&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&amp;nbsp;At address 0x0 appears:&lt;/P&gt;&lt;P&gt;0x0: 0x18 DC8 24; '.'&lt;/P&gt;&lt;P&gt;This does not seem like a "goto"...&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 19 May 2018 06:59:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769044#M30947</guid>
      <dc:creator>thieulam</dc:creator>
      <dc:date>2018-05-19T06:59:35Z</dc:date>
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    <item>
      <title>Re: lpcxx address at reset</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769045#M30948</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV style="left: 210px;"&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV class="" style="top: 0px;"&gt;&lt;DIV class="" style="left: 407px; top: 0px;"&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV class=""&gt;&lt;DIV&gt;&lt;DIV style="width: 100%;"&gt;&lt;TABLE border="0" cellpadding="0" cellspacing="0" style="margin: 0px; padding: 0px; width: 100%; background-color: white;" width="100%"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD style="padding: 20px;"&gt;&lt;TABLE border="0" cellpadding="0" cellspacing="0" style="width: 100%;" width="100%"&gt;&lt;TBODY&gt;&lt;TR style="height: 117px;"&gt;&lt;TD style="padding: 10px 0px 20px; height: 117px;" valign="middle"&gt;&lt;P&gt;Con Verse &lt;SPAN class="" lang="en"&gt;&lt;SPAN class=""&gt;answered me saying:&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;ARM processors are different. Address 0x0 contains the initial value to load into the stack pointer (SP), and address 0x4 contains the initial value to put into the PC.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;/DIV&gt;&lt;P&gt;&lt;SPAN class="" lang="en"&gt;&lt;SPAN class=""&gt;both at address 0 and at address 4 I have 0xe59ff018.&lt;BR /&gt;&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class="" lang="en"&gt;&lt;SPAN class=""&gt;but the PC go at address 0x8d4 after esecution of address 0x0..&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sat, 19 May 2018 14:30:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769045#M30948</guid>
      <dc:creator>thieulam</dc:creator>
      <dc:date>2018-05-19T14:30:39Z</dc:date>
    </item>
    <item>
      <title>Re: lpcxx address at reset</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769046#M30949</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Converse tells right for kinetis.!&lt;/P&gt;&lt;P&gt;For lpc is different ( i hope).&lt;/P&gt;&lt;P&gt;Is The jump address at 0x0020?&lt;/P&gt;&lt;P&gt;Lpc2468&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 25 May 2018 16:52:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769046#M30949</guid>
      <dc:creator>thieulam</dc:creator>
      <dc:date>2018-05-25T16:52:33Z</dc:date>
    </item>
    <item>
      <title>Re: lpcxx address at reset</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769047#M30950</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;With ARM (as opposed to Cortex-M) processors, at Reset, the processor fetches the *instruction* from address 0x0. This is typical a branch instruction, such as&amp;nbsp;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="font-family: terminal, monaco, monospace;"&gt;B _start&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;This is then followed by the rest of the vector table.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;If you use LPCXpresso as your IDE, (not MCUXpresso - which does not support LPC2000 parts), creating a project will&amp;nbsp;provide a standard&amp;nbsp;startup code for you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 28 May 2018 07:46:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/lpcxx-address-at-reset/m-p/769047#M30950</guid>
      <dc:creator>converse</dc:creator>
      <dc:date>2018-05-28T07:46:10Z</dc:date>
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