topic Re: Break detection on LPC 546xx in LPC Microcontrollers

Break detection on LPC 546xx

jan92 — Thu, 09 Nov 2017 09:15:00 GMT

Hello,

Iam having a trouble to detect the break on USART. I see on the osciloscope, that the break is active, I still receiving the interrupt on usart, but I have a problem to detect it... The if function is never true..

According the user manual, the RXBRK in STAT, should be active since the break longer than 16 bits..

This is the code I have in the interrupt:

uint32_t u32_pom = LIN1_USART->STAT;

if((u32_pom & (1 << USART_STAT_RXBRK_SHIFT)) != 0)
{
USART->CTL &= ~(1 << USART_CTL_TXBRKEN_SHIFT);
}

Thanks for help.

Re: Break detection on LPC 546xx

kerryzhou — Fri, 10 Nov 2017 06:31:43 GMT

Hi Jan,

Just use if is not enough, you can use while to wait the LIN break happens.

while(((LIN1_USART->STAT) & (1 << USART_STAT_RXBRK_SHIFT)) == 0) ;
Please test it, whether the code can get the UART_STAT[RXBRK]=1?
You can put a breakpoint below while code, then debug the code, and check the register.
Please modify the code and test it again.
If you still have problem, please also can check UART_STAT[DELTARXBRK], you also can enable INTENSET[DELTARXBRKEN], then you can check UART_STAT[DELTARXBRK] in the interrupt directly.
Any updated information after testing, please let me know!

Have a great day,
Kerry

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Re: Break detection on LPC 546xx

jan92 — Fri, 10 Nov 2017 07:53:31 GMT

Hi Kerry,

I found following behavior:

this works: while(((LIN1_USART->STAT) & (1 << USART_STAT_RXBRK_SHIFT))

== 0) ;

and then I found this behavior:

void DEMO_USART_IRQHandler(void)

Re: Break detection on LPC 546xx

jan92 — Fri, 10 Nov 2017 15:52:57 GMT

Hi Kerry,

I found following behavior:

this works: while(((LIN1_USART->STAT) & (1 << USART_STAT_RXBRK_SHIFT)) == 0) ;

and then I found this behavior:

void DEMO_USART_IRQHandler(void)
/* ---------------------------------------------------------------------------- */
{
    uint32_t u32_pom = LIN1_USART->STAT;
    u32_pom = LIN1_USART->STAT;                // Read STAT again, if this line is commented, it never work...

       if((u32_pom & USART_STAT_RXBRK(1)) != 0) //USART_STAT_RXBRK
       {
            LIN1_USART->CTL &= ~(1 << USART_CTL_TXBRKEN_SHIFT);
       }

}

If I read in the interrupt the USART->STAT twice, then the RXBRK appear.

Another question, what the LINMODE in CFG does?

When I set this:

LIN1_USART->CFG |= (1 << USART_CFG_LINMODE_SHIFT);

then the break generation doesnt work, otherwise yes.

Thanks for help.

Re: Break detection on LPC 546xx

kerryzhou — Tue, 14 Nov 2017 03:33:51 GMT

Hi Jan,

Ok, so the problem is still the if problem, if you use the polling, you need to use the while to check the flag.

Otherwise, you can use the interrupt.

Have a great day,
Kerry

Re: Break detection on LPC 546xx

kerryzhou — Tue, 14 Nov 2017 06:54:56 GMT

Hi Jan,

Answer your two questions:

1. RXBRK problem in interrupt

When you enable the LIN break interrupt, do you also enable other interrupt?

Please check this register:

You can just enable the DELTARXBRKEN bit, don't enable other interrupt.

Then when the LIN break happens, you can check UART_STAT[DELTARXBRK] and UART_STAT[RXBRK].

Please check it at first, what I am afraid, when the first time you read the LIN1_USART->STAT, the interrupt is not caused by the LIN break. so, please check the interrupt enable register, make sure you just enable the LIN break interrupt at first.

2. what the LINMODE in CFG does?

This is the LIN break mode enable, the register already give the description.

If you use the LIN bus, you need to set this bit to enable the LIN bus break detect function. Otherwise, the UART is the normal UART break function, not the LIN break function.

About the difference between the normal break and the LIN break, please check these description:

When you enable the LINMODE, after RX input remains low for 11 bit times, you will get the break state,and the received data is not stored in teh receive data buffer, buf if you are using the normal operation, you will also receive the character, and the framing error status.

You can check it on your side.

If you still have question about this topic, please kindly let me know!

Have a great day,
Kerry

Re: Break detection on LPC 546xx

jan92 — Sat, 16 Dec 2017 11:16:29 GMT

Dear Kerry,

I still have a problem. When I set

LIN1_USART->CFG |= USART_CFG_LINMODE(1);

LIN1_USART->INTENSET |= USART_INTENSET_DELTARXBRKEN(1);

EnableIRQ(DEMO_USART_IRQn);

Then the interrupt never appear. I think that the problem is with all INTENSET interrupts. When I set the FIFOINTENSET then the interrupt works.

Could you please help me how to set correctly the interrupt?

Thanks,

Jan

Re: Break detection on LPC 546xx

kerryzhou — Fri, 22 Dec 2017 08:44:56 GMT

Hi Jan,

Sorry for my later reply.

I just get a LIN analyzer on my side, I will do the test on my side, after the test, I will reply you ASAP.

Please keep patient, thanks a lot for your understanding.

Best Regards,

Kerry

Re: Break detection on LPC 546xx

kerryzhou — Wed, 03 Jan 2018 07:06:03 GMT

Hello Jan Hakl,

Thank you for your patience.

After I enable the LIN MODE, and the break interrupt, when I send the LIN data to LPC54608, it works OK on my side.

Please check these details.

1. Code

I modify the code based on the SDK:SDK_2.3.0_LPCXpresso54608\boards\lpcxpresso54608\driver_examples\usart\interrupt

Modify points:

1) fsl_uart.c

status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)

Line192:

    /* setup configuration and enable USART */
    base->CFG = USART_CFG_PARITYSEL(config->parityMode) | USART_CFG_STOPLEN(config->stopBitCount) |
                USART_CFG_DATALEN(config->bitCountPerChar) | USART_CFG_LOOP(config->loopback) | USART_CFG_ENABLE_MASK | USART_CFG_LINMODE_MASK;

2) usart_interrupt.c

main function.

   // USART_EnableInterrupts(DEMO_USART, kUSART_RxLevelInterruptEnable | kUSART_RxErrorInterruptEnable);
    //kerry add
    DEMO_USART->INTENSET |= USART_INTENSET_DELTARXBRKEN_MASK; //enables an interrupt when a change of state has occurred in the detection of a
received break condition (break condition asserted or deasserted).

2. Hardware

If you want to use the LIN, you need to connect the UART RX pin to the LIN physical layer.

Test board: LPCXpresso54608

LIN tool: PEAK PCAN-USB Pro.

3. Test Result:

Send LIN data:

You can find, I can enter the UART interrupt, and in STAT register, the DELTARXBRK is set, it means the UART already detect the LIN Receve Break.

You can try it on your side.

If you still have question about the LIN, please let me know.

Have a great day,
Kerry

Re: Break detection on LPC 546xx

jan92 — Mon, 08 Jan 2018 07:40:07 GMT

Dear Kerry,

I tryed and it works, but only if the LIN master is for example the

PCAN. If I want to have master and detect the break that I generate,

then the interrupt never appear.

To start the interrupt I use:

LIN1_USART->CTL |= 1 << USART_CTL_TXBRKEN_SHIFT;

Could you please try it like this?

Thanks

Jan

Dne 3.1.2018 v 8:06 kerryzhou napsal(a):

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Re: Break detection on LPC 546xx
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Re: Break detection on LPC 546xx

jan92 — Mon, 08 Jan 2018 12:22:48 GMT

I have one more question:

how do I clear the DELTARXBRK interrupt? Interrupt status register is read only. Since once the break is detected then I allways receiving the interrupt even if the LIN is disconnected.

Thanks

Jan

Re: Break detection on LPC 546xx

kerryzhou — Tue, 09 Jan 2018 07:08:42 GMT

Hi Jan Hakl,

Please check the user manual at first:

So, if you want to clear it , just write 1 to this bit.

I have created a LPC54608 LIN slave project after answering your question in the last time, this project I will share it in this community in the future, but now I send it to you at first.

You can check my project, it works OK on my side. This project contains the LIN slave data receive and the transmit.

Wish it helps you!

Have a great day,
Kerry

Re: Break detection on LPC 546xx

jan92 — Tue, 09 Jan 2018 07:20:23 GMT

Dear Kerry,

as I wrote, It works on my side as Slave when the break is generated in

other device (master). My problem is that I need to generate break and

then detect own break. When I start generating break by:

LIN1_USART->CTL |= 1 << USART_CTL_TXBRKEN_SHIFT;

Then I never get the interrupt that the break was detected.

Thanks

Jan

Re: Break detection on LPC 546xx

kerryzhou — Tue, 09 Jan 2018 07:32:16 GMT

Hi Jan,

I will try the master mode on my side, about the LIN master question, I will answer you after I test it, we still don't have the exit LPC54608 LIN project for your reference, I need to create it by myself, so it will need time.

Now, talk my thought at first:

After you run:

LIN1_USART->CTL |= 1 << USART_CTL_TXBRKEN_SHIFT;

Do you test the TX pin or the LIN bus? Whether the break is generated? Please take care:

TXBRKEN: value 1, Continuous break. Continuous break is sent immediately when this bit is set, and
remains until this bit is cleared.
A break may be sent without danger of corrupting any currently transmitting character if the transmitter is first disabled (TXDIS in CTL is set) and then waiting for the transmitter to be disabled (TXDISINT in STAT = 1) before writing 1 to
TXBRKEN.

As a LIN master, when you want to send the data, you Call the break send code, then disable it, send the data, this is master send process.

You said: I never get the interrupt that the break was detected

Do you mean, you connect your RX back to your TX? Just use your own UART module RX to detect the break? Please also tell me how you connect in the hardware? Just connect the RX to TX？

Have a great day,
Kerry

Re: Break detection on LPC 546xx

jan92 — Mon, 22 Jan 2018 13:30:09 GMT

I have the custom board with LIN transceiver. Do you have any updates on this topic??

Re: Break detection on LPC 546xx

kerryzhou — Fri, 09 Feb 2018 07:41:56 GMT

Hello Jan Hakl,

The LPC54608 LIN master already works on my side, the following code are my configurations:

I am using 9600 bps baudrate:

/*
 * The Clear BSD License
 * Copyright (c) 2016, Freescale Semiconductor, Inc.
 * Copyright 2016-2017 NXP
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without modification,
 * are permitted (subject to the limitations in the disclaimer below) provided
 * that the following conditions are met:
 *
 * o Redistributions of source code must retain the above copyright notice, this list
 *   of conditions and the following disclaimer.
 *
 * o Redistributions in binary form must reproduce the above copyright notice, this
 *   list of conditions and the following disclaimer in the documentation and/or
 *   other materials provided with the distribution.
 *
 * o Neither the name of the copyright holder nor the names of its
 *   contributors may be used to endorse or promote products derived from this
 *   software without specific prior written permission.
 *
 * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE GRANTED BY THIS LICENSE.
 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR
 * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

#include "board.h"
#include "fsl_usart.h"

#include "pin_mux.h"
#include <stdbool.h>
/*******************************************************************************
 * Definitions
 ******************************************************************************/
#define DEMO_USART USART0
#define DEMO_USART_CLK_SRC kCLOCK_Flexcomm0
#define DEMO_USART_CLK_FREQ CLOCK_GetFreq(kCLOCK_Flexcomm0)
#define DEMO_USART_IRQHandler FLEXCOMM0_IRQHandler
#define DEMO_USART_IRQn FLEXCOMM0_IRQn

/*! @brief Ring buffer size (Unit: Byte). */
#define DEMO_RING_BUFFER_SIZE 16

/*! @brief Ring buffer to save received data. */

/*******************************************************************************
 * Prototypes
 ******************************************************************************/

/*******************************************************************************
 * Variables
 ******************************************************************************/

uint8_t g_tipString[] =
    "Usart functional API interrupt example\r\nBoard receives characters then sends them out\r\nNow please input:\r\n";

/*
  Ring buffer for data input and output, in this example, input data are saved
  to ring buffer in IRQ handler. The main function polls the ring buffer status,
  if there are new data, then send them out.
  Ring buffer full: (((rxIndex + 1) % DEMO_RING_BUFFER_SIZE) == txIndex)
  Ring buffer empty: (rxIndex == txIndex)
*/
uint8_t demoRingBuffer[DEMO_RING_BUFFER_SIZE];
volatile uint16_t txIndex; /* Index of the data to send out. */
volatile uint16_t rxIndex; /* Index of the memory to save new arrived data. */

/*******************************************************************************
 * Code
 ******************************************************************************/
//kerry add LIN variable
#define DisableLinBreak DEMO_USART->INTENSET &= ~(USART_INTENSET_DELTARXBRKEN_MASK);
#define EnableLinBreak  DEMO_USART->INTENSET |= USART_INTENSET_DELTARXBRKEN_MASK;

#define IDLE                0x00          /**< IDLE state */
#define SEND_BREAK          0x01          /**< Send break field state */
#define SEND_PID            0x02          /**< send PID state */
#define RECV_SYN            0x03          /**< receive synchronize state */
#define RECV_PID            0x04          /**< receive PID state */
#define IGNORE_DATA         0x05          /**< ignore data state */
#define RECV_DATA           0x06          /**< receive data state */
#define SEND_DATA           0x07          /**< send data state */
#define SEND_DATA_COMPLETED 0x08          /**< send data completed state */
#define PROC_CALLBACK       0x09          /**< proceduce callback state */
#define SLEEP_MODE          0x0A          /**< sleep mode state */
#define UNINIT              0xFF          /**< uninitialize state */

uint8_t Lin_BKflag=0;
volatile uint16_t cnt=0, recdatacnt=0;
static uint8_t          state = UNINIT;
uint8_t rxbuff[20] = {0};
uint8_t Sub_rxbuff[20] = {0};
//kerry add end 
void DEMO_USART_IRQHandler(void)
{
  
 
  if(DEMO_USART->STAT & USART_INTENSET_DELTARXBRKEN_MASK) // detect LIN break
     {
       DEMO_USART->STAT |= USART_INTENSET_DELTARXBRKEN_MASK;// clear the bit
       Lin_BKflag = 1;
       cnt = 0;
       state = RECV_SYN;
       DisableLinBreak;
      
     }
    if((kUSART_RxFifoNotEmptyFlag | kUSART_RxError) & USART_GetStatusFlags(DEMO_USART))
     {
       USART_ClearStatusFlags(DEMO_USART,kUSART_TxError | kUSART_RxError);
          rxbuff[cnt] = USART_ReadByte(DEMO_USART);;
         
         switch(state)
         {
            case RECV_SYN:
                          if(0x55 == rxbuff[cnt])
                          {
                              state = RECV_PID;
                          }
                          else
                          {
                              state = IDLE;
                              DisableLinBreak;
                          }
                          break;
            case RECV_PID:
                          if(0xAD == rxbuff[cnt])
                          {
                              state = SEND_DATA;
                          }
                          else if(0XEC == rxbuff[cnt])
                          {
                              state = RECV_DATA;
                          }
                          else
                          {
                              state = IDLE;
                              DisableLinBreak;
                          }
                          break;
            case RECV_DATA:
                         Sub_rxbuff[recdatacnt++]= rxbuff[cnt];
                          //recdatacnt++;
                          if(recdatacnt >= 3) // 2 Bytes data + 1 Bytes checksum
                          {
                              recdatacnt=0;
                              state = RECV_SYN;
                              EnableLinBreak;
                          }
                          break;
            case SEND_DATA:
                          recdatacnt++;
                          if(recdatacnt >= 4) // 2 Bytes data + 1 Bytes checksum
                          {
                              recdatacnt=0;
                              state = RECV_SYN;
                              EnableLinBreak;
                          }
                          break;                          
         default:break;
                          
         }
         
         cnt++;
     }
  
 
    /* Add for ARM errata 838869, affects Cortex-M4, Cortex-M4F Store immediate overlapping
      exception return operation might vector to incorrect interrupt */
#if defined __CORTEX_M && (__CORTEX_M == 4U)
    __DSB();
#endif
}

/********************************************************************************************/
/*Publisher LIN frame
/*13bit break+0x55 sync+0xad(0x2D's protected ID)+0x01+0x02+0x03+0x4C(check sum)
//All the above byte is sent by the LIN master
/********************************************************************************************/
void Lin_Master_Publisher(void)
{
    unsigned int i=0;
//===============================LIN master send=====================

       DEMO_USART->CTL |= USART_CTL_TXBRKEN_MASK;//enable TX break;
       while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0Xff);//dummy byte, no means
            break;  //just send one byte, otherwise, will send 16 bytes
        }  
       for(i=0;i<10000;i++); // delay for the break generation.
       DEMO_USART->CTL &= ~(USART_CTL_TXBRKEN_MASK); //disable TX break

       // Send the syncy byte 0x55.
        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0X55);
            break;  //just send one byte, otherwise, will send 16 bytes
        }  
       //protected ID
        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0Xad);
            break;  //just send one byte, otherwise, will send 16 bytes
        } 
        //Data1
       while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0X01);
            break;  //just send one byte, otherwise, will send 16 bytes
        }   
        //Data2
        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0X02);
            break;  //just send one byte, otherwise, will send 16 bytes
        }
        //Data3
        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0X03);
            break;  //just send one byte, otherwise, will send 16 bytes
        }      
        // checksum byte
        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0X4c);
            break;  //just send one byte, otherwise, will send 16 bytes
        }     

}

void Lin_Master_Subscribe(void)
{
  unsigned int i=0;
       DEMO_USART->CTL |= USART_CTL_TXBRKEN_MASK;//enable TX break;
       while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0Xff);//dummy byte, no means
            break;  //just send one byte, otherwise, will send 16 bytes
        }  
       for(i=0;i<10000;i++); // delay for the break generation.
      // for(i=0;i<5000;i++); 
       DEMO_USART->CTL &= ~(USART_CTL_TXBRKEN_MASK); //disable TX break

       // Send the syncy byte 0x55.
        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0X55);
            break;  //just send one byte, otherwise, will send 16 bytes
        }  
       //protected ID
        while (kUSART_TxFifoNotFullFlag & USART_GetStatusFlags(DEMO_USART))
        {
            USART_WriteByte(DEMO_USART, 0XEC);
            break;  //just send one byte, otherwise, will send 16 bytes
        } 

   // state = RECV_DATA;
        /*
    cnt=0;        
    USART_EnableInterrupts(DEMO_USART, kUSART_RxLevelInterruptEnable | kUSART_RxErrorInterruptEnable);
    EnableIRQ(DEMO_USART_IRQn);   
 */  


}
/*!
 * @brief Main function
 */
int main(void)
{
unsigned int i=0;
    usart_config_t config;

    /* attach 12 MHz clock to FLEXCOMM0 (debug console) */
    CLOCK_AttachClk(BOARD_DEBUG_UART_CLK_ATTACH);

    BOARD_InitPins();
    BOARD_BootClockFROHF48M();
    BOARD_InitDebugConsole();

    /*
     * config.baudRate_Bps = 19200U;
     * config.parityMode = kUSART_ParityDisabled;
     * config.stopBitCount = kUSART_OneStopBit;
     * config.loopback = false;
     * config.enableTxFifo = false;
     * config.enableRxFifo = false;
     */
    USART_GetDefaultConfig(&config);
    config.baudRate_Bps = BOARD_DEBUG_UART_BAUDRATE;
    config.enableTx = true;
    config.enableRx = true;

    USART_Init(DEMO_USART, &config, DEMO_USART_CLK_FREQ);

    /* Enable RX interrupt. */
    DEMO_USART->INTENSET |= USART_INTENSET_DELTARXBRKEN_MASK; //USART_INTENSET_STARTEN_MASK | 
   
    //enable USART interrupt
    cnt=0;        
    USART_EnableInterrupts(DEMO_USART, kUSART_RxLevelInterruptEnable | kUSART_RxErrorInterruptEnable);
    EnableIRQ(DEMO_USART_IRQn);//All ID datas will be received in the interrupt


   
       
//========================================
    
    Lin_Master_Publisher(); //LIN master send publisher ID 0x2D
    
    for(i=0;i<65535;i++);//delay
    
    Lin_Master_Subscribe();//LIN master send subscriber ID 0x2c
    
    


    while (1)
    {


    }
}
‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

status_t USART_Init(USART_Type *base, const usart_config_t *config, uint32_t srcClock_Hz)
{
    int result;

    /* check arguments */
    assert(!((NULL == base) || (NULL == config) || (0 == srcClock_Hz)));
    if ((NULL == base) || (NULL == config) || (0 == srcClock_Hz))
    {
        return kStatus_InvalidArgument;
    }

    /* initialize flexcomm to USART mode */
    result = FLEXCOMM_Init(base, FLEXCOMM_PERIPH_USART);
    if (kStatus_Success != result)
    {
        return result;
    }

    /* setup baudrate */
    result = USART_SetBaudRate(base, config->baudRate_Bps, srcClock_Hz);
    if (kStatus_Success != result)
    {
        return result;
    }

    if (config->enableTx)
    {
        /* empty and enable txFIFO */
        base->FIFOCFG |= USART_FIFOCFG_EMPTYTX_MASK | USART_FIFOCFG_ENABLETX_MASK;
        /* setup trigger level */
        base->FIFOTRIG &= ~(USART_FIFOTRIG_TXLVL_MASK);
        base->FIFOTRIG |= USART_FIFOTRIG_TXLVL(config->txWatermark);
        /* enable trigger interrupt */
        base->FIFOTRIG |= USART_FIFOTRIG_TXLVLENA_MASK;
    }

    /* empty and enable rxFIFO */
    if (config->enableRx)
    {
        base->FIFOCFG |= USART_FIFOCFG_EMPTYRX_MASK | USART_FIFOCFG_ENABLERX_MASK;
        /* setup trigger level */
        base->FIFOTRIG &= ~(USART_FIFOTRIG_RXLVL_MASK);
        base->FIFOTRIG |= USART_FIFOTRIG_RXLVL(config->rxWatermark);
        /* enable trigger interrupt */
        base->FIFOTRIG |= USART_FIFOTRIG_RXLVLENA_MASK;
    }
    /* setup configuration and enable USART */
    base->CFG = USART_CFG_PARITYSEL(config->parityMode) | USART_CFG_STOPLEN(config->stopBitCount) |
                USART_CFG_DATALEN(config->bitCountPerChar) | USART_CFG_LOOP(config->loopback) | USART_CFG_ENABLE_MASK | USART_CFG_LINMODE_MASK;//
    return kStatus_Success;
}‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍‍

You can try it on your side.

Have a great day,
Kerry

Re: Break detection on LPC 546xx

Xiaoyh — Thu, 29 Apr 2021 08:00:41 GMT

I use a normal opration and enable framerro IRQ but when I received a frame data the frameerro flag can't set 1 and it can't go to usart IRQ！

thank you!