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    <title>topic Re: Whether LPC1768 supports bit banding for SRAM and peripherals ? in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756853#M30459</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a similar question about the LPC15xx&lt;/P&gt;&lt;P&gt;The Cortex-M3 reference manual says:&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: #ffffff; font-size: small;"&gt;"The processor memory map includes two bit-band regions. These occupy the lowest 1MB of the SRAM and Peripheral memory regions respectively. These bit-band regions map each word in an alias region of memory to a bit in a bit-band region of memory."&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: #ffffff; font-size: small;"&gt;and it defines the lower region of RAM as starting at 0x20000000, but in the LPC15xx that is not where the RAM is.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: #ffffff; font-size: small;"&gt;Does that mean that the LPC15xx cannot do bit banding as its RAM appears to be in the wrong place, in the place that ARM defines as code memory?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: #ffffff; font-size: small;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Thu, 31 Jan 2019 13:29:08 GMT</pubDate>
    <dc:creator>ianbenton</dc:creator>
    <dc:date>2019-01-31T13:29:08Z</dc:date>
    <item>
      <title>Whether LPC1768 supports bit banding for SRAM and peripherals ?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756849#M30455</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello, I am using LPC1768. My question is whether the bit band alias regions for SRAM and peripheral populated in this device or in other words whether bit banding support is available?&amp;nbsp;&lt;/P&gt;&lt;P&gt;I mean the following regions.&lt;/P&gt;&lt;P&gt;SRAM : 0x22000000 - 0x23FFFFFF&lt;/P&gt;&lt;P&gt;Peripheral : 0x42000000 - 0x44FFFFFF&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks &amp;amp; Regards,&lt;/P&gt;&lt;P&gt;Vinoth&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 14 Mar 2018 11:06:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756849#M30455</guid>
      <dc:creator>bagyavinothap</dc:creator>
      <dc:date>2018-03-14T11:06:16Z</dc:date>
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    <item>
      <title>Re: Whether LPC1768 supports bit banding for SRAM and peripherals ?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756850#M30456</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi&amp;nbsp;&lt;SPAN style="color: #646464; background-color: #ffffff;"&gt; &lt;/SPAN&gt;&lt;A _jive_internal="true" data-content-finding="Community" data-userid="315225" data-username="bagyavinothap" href="https://community.nxp.com/people/bagyavinothap" style="color: #5e89c1; background-color: #ffffff; border: 0px; font-weight: 600; text-decoration: none; font-size: 12.6316px;"&gt;bagyavinoth ap&lt;/A&gt;,&lt;/P&gt;&lt;DIV style="font-size: 14px;"&gt;&lt;SPAN&gt;Thank you for your interest in NXP Semiconductor products and&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="font-size: 14px;"&gt;&lt;SPAN&gt;the opportunity to serve you.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;1)My question is whether the bit band alias regions for SRAM and peripheral populated in this device or in other words whether bit banding support is available?&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;-- Yes, it does.&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit;"&gt;Have a great day,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit;"&gt;TIC&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit;"&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit;"&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit;"&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/DIV&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Mar 2018 09:52:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756850#M30456</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2018-03-15T09:52:33Z</dc:date>
    </item>
    <item>
      <title>Re: Whether LPC1768 supports bit banding for SRAM and peripherals ?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756851#M30457</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Thanks a lot for your input. &lt;/P&gt;&lt;P&gt;As per cortex M-3 specification&lt;/P&gt;&lt;P&gt;SRAM bit band region range : 0x20000000 - 0x200FFFFF&lt;/P&gt;&lt;P&gt;SRAM bit band alias region range : 0x22000000 - 0x23FFFFFF&amp;nbsp;&amp;nbsp; &lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In LPC1768, we have following SRAM regions,&lt;/P&gt;&lt;P&gt;32 kB SRAM: 0x10000000 to 0x10007FFF&amp;nbsp; &lt;BR /&gt;16 kB SRAM0: 0x2007C000 to 0x2007FFFF&lt;BR /&gt;16 kB SRAM1: 0x20080000 to 0x20083FFF&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So, if i understand correctly,&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;32kB block is not part of the bit band region and it will not support bit banding.&lt;/P&gt;&lt;P&gt;The 16kB blocks are part of the bit band region and it should support bit banding.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;Am i right about that ?&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;And also as per cortex M3 specification&lt;/P&gt;&lt;P&gt;Peripheral bit band region range : 0x40000000 - 0x400FFFFF&lt;/P&gt;&lt;P&gt;Peripheral bit band alias region range : 0x42000000 - 0x44FFFFFF&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In LPC1768, we have following peripheral regions,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;APB0:&amp;nbsp;&amp;nbsp; &amp;nbsp;0x40000000 to 0x4007FFFF (32 Peripherals. Each 16 kB)&lt;BR /&gt;APB1:&amp;nbsp;&amp;nbsp; &amp;nbsp;0x40080000 to 0x400FFFFF (32 Peripherals. Each 16 kB)&lt;BR /&gt;AHB:&amp;nbsp;&amp;nbsp; &amp;nbsp;0x50000000 to 0x501FFFFF (128 Peripherals. Each 16 kB)&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;So if i understand correctly,&lt;/P&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;The APB peripherals will support bit banding.&lt;/P&gt;&lt;P&gt;AHB peripherals won't support bit banding.&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;EM&gt;&lt;STRONG&gt;Am i right about that ?&lt;/STRONG&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Thanks in advance.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Regards,&lt;/P&gt;&lt;P&gt;Vinoth&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 15 Mar 2018 10:13:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756851#M30457</guid>
      <dc:creator>bagyavinothap</dc:creator>
      <dc:date>2018-03-15T10:13:01Z</dc:date>
    </item>
    <item>
      <title>Re: Whether LPC1768 supports bit banding for SRAM and peripherals ?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756852#M30458</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Vinoth,&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Thanks for your reply.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Both of answers are Yes, and you can learn the more detailed information in the section&lt;STRONG&gt; 34.3.2.5 Bit-banding &lt;/STRONG&gt;in the UM10360.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #51626f; background-color: #ffffff;"&gt;Hope it helps.&lt;/SPAN&gt;&lt;/P&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit; font-size: 14px;"&gt;Have a great day,&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit; font-size: 14px;"&gt;TIC&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit; font-size: 14px;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit; font-size: 14px;"&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit; font-size: 14px;"&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="border: 0px; font-size: 14px;"&gt;&lt;SPAN style="border: 0px; font-weight: inherit; font-size: 14px;"&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 16 Mar 2018 06:11:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756852#M30458</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2018-03-16T06:11:39Z</dc:date>
    </item>
    <item>
      <title>Re: Whether LPC1768 supports bit banding for SRAM and peripherals ?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756853#M30459</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I have a similar question about the LPC15xx&lt;/P&gt;&lt;P&gt;The Cortex-M3 reference manual says:&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: #ffffff; font-size: small;"&gt;"The processor memory map includes two bit-band regions. These occupy the lowest 1MB of the SRAM and Peripheral memory regions respectively. These bit-band regions map each word in an alias region of memory to a bit in a bit-band region of memory."&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: #ffffff; font-size: small;"&gt;and it defines the lower region of RAM as starting at 0x20000000, but in the LPC15xx that is not where the RAM is.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: #ffffff; font-size: small;"&gt;Does that mean that the LPC15xx cannot do bit banding as its RAM appears to be in the wrong place, in the place that ARM defines as code memory?&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN style="color: #000000; background-color: #ffffff; font-size: small;"&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Thu, 31 Jan 2019 13:29:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Whether-LPC1768-supports-bit-banding-for-SRAM-and-peripherals/m-p/756853#M30459</guid>
      <dc:creator>ianbenton</dc:creator>
      <dc:date>2019-01-31T13:29:08Z</dc:date>
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