topic regarding SDRAM in LPC Microcontrollers

regarding SDRAM

TEMCEFF — Wed, 30 May 2018 11:41:38 GMT

1.sd ram data is corrupted when reading after some time, corrupted data looks like data is shifted by 2 byte for 14 bytes. in LPC54608 iam using 4Mb*16 (AS4C4M16SA ) SD RAM.

2.if I started data feteching from a location that is multiples of 16 bytes data is not corrupted, if I started data feteching location other than multiples of 16 bytes like multiples of 4 that is corrupted as mentioned above.

Re: regarding SDRAM

jeremyzhou — Fri, 01 Jun 2018 02:48:28 GMT

Hi Muralidhar M,

Thank you for your interest in NXP Semiconductor products and
It seems a bit weird and I was wondering if you can share a compile-able demo which can replicate the phenomenon.
it's helpful to figure it out by me.

Have a great day,
TIC

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Re: regarding SDRAM

TEMCEFF — Thu, 11 Oct 2018 04:51:04 GMT

thank sir.

the scenario is

when we write and read immediate it is working fine ,if we read after some time the the data bytes are shifting 2-4 bytes but occur randomly

example

the data written to SD RAM

0xA0000000 -> 0x00000000 0x44332211 0x88776655

0xA000000C->0x000000001 0x44332211 0x88776655

....

.....

data reading after some time

0xA0000000 -> 0x00000000 0x44332211 0x88778877

0xA000000C->0x000000001 0x44332211 0x88776655

the SD RAM we used is AS4C4M16SA-6TIN

the timming we have initialized

are

#define SDRAM_REFRESHPERIOD_NS (64 * 1000000 / 4096) /* 4096 rows/ 64ms */
#define SDRAM_TRP_NS (21u)
#define SDRAM_TRAS_NS (42u)
#define SDRAM_TSREX_NS (67u)
#define SDRAM_TAPR_NS (20u)
#define SDRAM_TWRDELT_NS (6u)
#define SDRAM_TRC_NS (60u)
#define SDRAM_RFC_NS (60u)
#define SDRAM_XSR_NS (67u)
#define SDRAM_RRD_NS (14u)
#define SDRAM_MRD_NCLK (2u)
#define SDRAM_RAS_NCLK (2u)
#define SDRAM_MODEREG_VALUE (0x33u)
#define SDRAM_DEV_MEMORYMAP (0x05u) /* 64Mbits (4M*16, 4banks, 12 rows, 8 columns)*/

we used SDK emc files .