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    <title>topic Re: LCD DMA FIFOs cascading: is it automatically preset in single panel mode? in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717318#M28987</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A _jive_internal="true" data-content-finding="Community" data-userid="220181" data-username="michelesponchiado" href="https://community.nxp.com/people/michelesponchiado"&gt;michele sponchiado&lt;/A&gt;,&lt;/P&gt;&lt;DIV style="white-space: pre-wrap; text-align: left; line-height: 1.75; font-size: 14px;"&gt;&lt;SPAN style="font-family: 'Microsoft YaHei', STXihei; background-color: #ffffff;"&gt;Thank you for your interest in NXP Semiconductor products and&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="white-space: pre-wrap; text-align: left; line-height: 1.75; font-size: 14px;"&gt;&lt;SPAN style="font-family: 'Microsoft YaHei', STXihei; background-color: #ffffff;"&gt;for the opportunity to serve you.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;STRONG&gt; Two 16 words deep by 64 bits wide FIFOs will be cascaded to form an effective 32-Dword deep&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;FIFO in single panel mode automatically.&lt;/STRONG&gt;&lt;EM&gt;&lt;BR /&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;And the LPC4357 doesn't contain the LCD controller module, so you need to consider other replacements.&lt;EM&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/34188iFF1D4B72F070F4E5/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 26 Dec 2017 07:48:41 GMT</pubDate>
    <dc:creator>jeremyzhou</dc:creator>
    <dc:date>2017-12-26T07:48:41Z</dc:date>
    <item>
      <title>LCD DMA FIFOs cascading: is it automatically preset in single panel mode?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717316#M28985</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, LPC4357 gurus!&lt;/P&gt;&lt;P&gt;I am working on a new project using your lovely LPC4357 and I am checking if there is a way to increase the LCD refresh rate of my -rather challenging- 800 x 480 x 24bit LCD display.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;From the LPC4357 user manual 29.7.2 "Dual DMA FIFOs and associated control logic", first paragraph:&lt;/P&gt;&lt;P style="padding-left: 30px;"&gt;&lt;EM&gt;The pixel data accessed from memory is buffered by two DMA FIFOs that can be&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;independently controlled to cover single and dual-panel LCD types. Each FIFO is 16&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;words deep by 64 bits wide and &lt;STRONG&gt;can be cascaded&lt;/STRONG&gt; to form an effective 32-Dword deep&lt;/EM&gt;&lt;BR /&gt;&lt;EM&gt;FIFO in single panel mode.&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am wondering if, &lt;STRONG&gt;when in single panel mode&lt;/STRONG&gt;:&lt;/P&gt;&lt;UL&gt;&lt;LI&gt;the LCD FIFOs are automagically cascaded -no further settings needed&lt;/LI&gt;&lt;LI&gt;or if there is some bit -into some control register- to set to force the LCD FIFOs cascading, because it isn't enabled when setting the single panel mode&lt;/LI&gt;&lt;/UL&gt;&lt;P&gt;I am really hoping the cascading isn't automatic when in single panel mode so there would be a way to force the cascading and get a double length FIFO, which in turn could be very useful to increase the LCD refresh rate!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Many thanks for your help!&lt;/P&gt;&lt;P&gt;Michele&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 13 Dec 2017 15:56:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717316#M28985</guid>
      <dc:creator>michelesponchia</dc:creator>
      <dc:date>2017-12-13T15:56:12Z</dc:date>
    </item>
    <item>
      <title>Re: LCD DMA FIFOs cascading: is it automatically preset in single panel mode?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717317#M28986</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, I wonder if &lt;SPAN style="color: #000000;"&gt;&lt;STRONG&gt;some guru from NXP&lt;/STRONG&gt;&lt;/SPAN&gt; can check the previous question.&lt;/P&gt;&lt;P&gt;From the documentation, it is&amp;nbsp; not really clear if the FIFO cascade mode auto-activates when in single panel mode, and I would like some confirmation about it; if there is some hidden setup to activate the cascading, this means I could drive the LCP panel with a bigger pixel frequency!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best regards&lt;/P&gt;&lt;P&gt;Michele&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 18 Dec 2017 11:40:49 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717317#M28986</guid>
      <dc:creator>michelesponchia</dc:creator>
      <dc:date>2017-12-18T11:40:49Z</dc:date>
    </item>
    <item>
      <title>Re: LCD DMA FIFOs cascading: is it automatically preset in single panel mode?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717318#M28987</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;A _jive_internal="true" data-content-finding="Community" data-userid="220181" data-username="michelesponchiado" href="https://community.nxp.com/people/michelesponchiado"&gt;michele sponchiado&lt;/A&gt;,&lt;/P&gt;&lt;DIV style="white-space: pre-wrap; text-align: left; line-height: 1.75; font-size: 14px;"&gt;&lt;SPAN style="font-family: 'Microsoft YaHei', STXihei; background-color: #ffffff;"&gt;Thank you for your interest in NXP Semiconductor products and&amp;nbsp;&lt;/SPAN&gt;&lt;/DIV&gt;&lt;DIV style="white-space: pre-wrap; text-align: left; line-height: 1.75; font-size: 14px;"&gt;&lt;SPAN style="font-family: 'Microsoft YaHei', STXihei; background-color: #ffffff;"&gt;for the opportunity to serve you.&lt;/SPAN&gt;&lt;/DIV&gt;&lt;P&gt;&lt;STRONG&gt; Two 16 words deep by 64 bits wide FIFOs will be cascaded to form an effective 32-Dword deep&lt;/STRONG&gt;&lt;BR /&gt;&lt;STRONG&gt;FIFO in single panel mode automatically.&lt;/STRONG&gt;&lt;EM&gt;&lt;BR /&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;And the LPC4357 doesn't contain the LCD controller module, so you need to consider other replacements.&lt;EM&gt;&lt;BR /&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/34188iFF1D4B72F070F4E5/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Dec 2017 07:48:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717318#M28987</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2017-12-26T07:48:41Z</dc:date>
    </item>
    <item>
      <title>Re: LCD DMA FIFOs cascading: is it automatically preset in single panel mode?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717319#M28988</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi, &lt;STRONG class=""&gt;&lt;SPAN class=""&gt;jeremyzhou!&lt;/SPAN&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Many thanks for your help!&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;About your statement: &lt;EM&gt;And the LPC4357 doesn't contain the LCD controller module, so you need to consider other replacements.&lt;/EM&gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;&lt;STRONG&gt;&lt;SPAN style="color: #ff6600;"&gt;The LPC4357 chip really contains the LCD controller module, we already used it in a very successful project two years ago.&lt;/SPAN&gt; &lt;/STRONG&gt;Please check your own website from &lt;A class="link-titled" href="https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/lpc-cortex-m-mcus/lpc4300-cortex-m4-m0/high-performance-32-bit-microcontroller-mcu-based-on-arm-cortex-m4-m0-cores:LPC4357FET256" title="https://www.nxp.com/products/processors-and-microcontrollers/arm-based-processors-and-mcus/lpc-cortex-m-mcus/lpc4300-cortex-m4-m0/high-performance-32-bit-microcontroller-mcu-based-on-arm-cortex-m4-m0-cores:LPC4357FET256"&gt;LPC4357FET256|ARM Cortex-M4/M0|32-bit MCU|NXP&lt;/A&gt;&amp;nbsp;&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;where it states:&lt;/SPAN&gt;&lt;EM&gt;&lt;SPAN class=""&gt;LCD controller with dedicated DMA controller and a selectable display resolution.&lt;/SPAN&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;EM&gt;&lt;SPAN class=""&gt;&lt;/SPAN&gt;&lt;/EM&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Best regards&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;SPAN class=""&gt;Michele&lt;/SPAN&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 26 Dec 2017 18:02:17 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717319#M28988</guid>
      <dc:creator>michelesponchia</dc:creator>
      <dc:date>2017-12-26T18:02:17Z</dc:date>
    </item>
    <item>
      <title>Re: LCD DMA FIFOs cascading: is it automatically preset in single panel mode?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717320#M28989</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi &lt;SPAN class=""&gt;&lt;A _jive_internal="true" data-content-finding="Community" data-userid="220181" data-username="michelesponchiado" href="https://community.nxp.com/people/michelesponchiado"&gt;michele sponchiado&lt;/A&gt;&lt;/SPAN&gt;,&lt;/P&gt;&lt;P&gt;Thanks for your reply.&lt;/P&gt;&lt;P&gt;Yes, you're right, and I had already reported this typo to Document team for checking.&lt;/P&gt;&lt;P&gt;Have a great day,&lt;BR /&gt;TIC&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 27 Dec 2017 02:38:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LCD-DMA-FIFOs-cascading-is-it-automatically-preset-in-single/m-p/717320#M28989</guid>
      <dc:creator>jeremyzhou</dc:creator>
      <dc:date>2017-12-27T02:38:27Z</dc:date>
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