LPC MicrocontrollersのトピックLPC4357 Slave core Cortex-M0 not running from SRAM , only BankB flash?

LPC4357 Slave core Cortex-M0 not running from SRAM , only BankB flash?

muhammadt — Thu, 21 Sep 2017 12:52:31 GMT

Hullo Guys , I'm developing code for the LPC4357 dual-core MCU . Im using KEIL IDE . I managed to create separate codes for each core . The problem is that when I execute the Cortex-M0 code from Flash Bank B (pointed to by the M0APPMEMMAP shadow register ) it works as it should . But when I try run the code from anywhere else , whether internal SRAM or external SDRAM (also pointed to by M0APPMEMMAP) , by copying the generated image file from the M0 project into that SRAM/SDRAM location , its not working ??? .
In KEIL , I set the Target options for the M0 project properly , thus the generated linker script points to the correct memory areas IRAM and IROM .
So far I think its linking problem such that I do not seem to remap the Vector table properly.

This is the settings of the M0 Memory areas .
Any ideas ? ????#

Re: LPC4357 Slave core Cortex-M0 not running from SRAM , only BankB flash?

jeremyzhou — Fri, 22 Sep 2017 02:41:19 GMT

Hi Muhammad T,

To provide the fastest possible support I want to point you to a

similar question which has been answered on our NXP community.

Please refer to the application:

https://blog.nxp.com/mcus/an1117-ipc-on-lpc43xx-managing-inter-processor-communications-in-the-dual-core-lpc4300?fsrch=1&sr=1&pageNum=1

to view the details.

Hope it helps.
Have a great day,
Ping

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Re: LPC4357 Slave core Cortex-M0 not running from SRAM , only BankB flash?

muhammadt — Fri, 22 Sep 2017 09:10:32 GMT

Thx for ur answer Jeremy , but that does not answer the qs at all .