Variation in current consumption for different offsets in memory regions why?

himanshudoshi — Fri, 15 Sep 2017 10:57:05 GMT

Hello to all,

I am trying to figure out the variation in current consumption as well as in clock cycles due to different memory regions and different offsets. During various experiments, I have found the following results:

LDR R4,[R1,#0x0] (R1 = 0x00000000 (Flash) with 0 offset) : Current = 2.60mAmps & Cycles = 2

LDR R4,[R1,#0x1] (R1 = 0x00000000 (Flash) with 1 offset) : Current = 2.07mAmps & Cycles = 4

LDR R4,[R1,#0x2] (R1 = 0x00000000 (Flash) with 2 offset) : Current = 2.30mAmps & Cycles = 3

LDR R4,[R1,#0x3] (R1 = 0x00000000 (Flash) with 3 offset) : Current = 2.08mAmps & Cycles = 4

from offset 4 it repeats the order. I mean Offset = 4 is equal to Offset = 0 ; Offset = 5 is equal to Offset = 1 ; Offset = 6 is equal to Offset = 2 ; Offset = 7 is equal to Offset = 3 ; Offset = 8 is equal to Offset = 0 and so on....

Similarly, while access SRAMX also :

LDR R4,[R1,#0x0] (R1 = 0x04000000 (Flash) with 0 offset) : Current = 2.88mAmps & Cycles = 1

LDR R4,[R1,#0x1] (R1 = 0x04000000 (Flash) with 1 offset) : Current = 2.30mAmps & Cycles = 3

LDR R4,[R1,#0x2] (R1 = 0x04000000 (Flash) with 2 offset) : Current = 2.65mAmps & Cycles = 2

LDR R4,[R1,#0x3] (R1 = 0x04000000 (Flash) with 3 offset) : Current = 2.29mAmps & Cycles = 3

On the basis of observation, I have two question:

Why different offset value, results into different current consumption?
What is the reason for current variations, while accessing different memory regions?

Kindly help me out with this. I am using LPCXpresso 54114 board, with ARM Cortex-M4 processor. And all the measurement have been taken at 12MHz.

Thanking you,

Regards,

Himanshu

Re: Variation in current consumption for different offsets in memory regions why?

jeremyzhou — Tue, 19 Sep 2017 02:50:55 GMT

Hi HIMANSHU DOSHI ,

Thank you for your interest in NXP Semiconductor products and 

for the opportunity to serve you.

I'd like to get the more information, for instance, whether you can introduce the testing steps in details.

Have a great day,

TIC

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Variation in current consumption for different offsets in memory regions why?

Re: Variation in current consumption for different offsets in memory regions why?