topic using the LPCXpresso IDE with the LPCXpresso43S67 board and 2 example programs periph_uart and periph_uart_rb. I get garabge on the terminal. in LPC Microcontrollers

using the LPCXpresso IDE with the LPCXpresso43S67 board and 2 example programs periph_uart and periph_uart_rb. I get garabge on the terminal.

paulhembrook — Tue, 13 Jun 2017 20:47:16 GMT

Using the LPCXpresso IDE with the LPCXpresso43S67 board and 2 example programs periph_uart and periph_uart_rb. I have wired the rsr232 output to the PC rs232 port and run Tera Term. I get text in the Tera Term window but it is garbage. When it is looking for autobaud I hit a key 'A' and a large amount of text garbage comes out. I believe the wiring is correct since I seem to be receiving data. The ring buffer version actually sets the baud rate at 115200 which is what I have set for the Tera Term. When I put a logic analyzer on the receive and use an rs232 interpreter of the logic analyzer I see the same garbage. But when I change the logic level of the rs232 from negative (default) to pos it interprets the data correctly. I do not have control of the logic level in Tera Term. How do I get this to work ??

Re: using the LPCXpresso IDE with the LPCXpresso43S67 board and 2 example programs periph_uart and periph_uart_rb. I get garabge on the terminal.

Carlos_Mendoza — Tue, 04 Jul 2017 14:33:06 GMT

Hi Paul,

I'm not sure if the logic levels can be managed from Tera Term. I would recommend you to use the target MCU UART0 through the virtual communication port (VCOM) UART bridge Link2 function to your host computer using the USB Link2 (J5).

Hope it helps!

Best Regards,
Carlos Mendoza
Technical Support Engineer

Re: using the LPCXpresso IDE with the LPCXpresso43S67 board and 2 example programs periph_uart and periph_uart_rb. I get garabge on the terminal.

paulhembrook — Wed, 05 Jul 2017 13:37:59 GMT

Carlos,

Thanks for your response.

What I realized after I sent the questions was that the output of the GPIO port used for the Uart is not a high enough voltage level for the PC to accept as RS232 levels. If I add a TTL to RS232 adaptor it works fine since it raises the voltage level and inverts the signal. I noticed that on a board we are design that there is driver/inverters on the TTL lines for the uart port. My analyzer was able to read it because it accepts lower level TTL and when I changed the interpreter to invert the levels it captures valid RS232 traffic.

I have tried the USB/UART examples and they work fine. My end design need is for a true RS232 port not a USB/RS232 port.

So I am good … thanks again for your help.

Paul H.