<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: External SDRAM bank selection on LPC407x in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/External-SDRAM-bank-selection-on-LPC407x/m-p/682326#M27450</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Otavio,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You must use A13 and A14 instead of A12 and A13. The LPC4088 always uses A13/A14 to output the bank select signals, independent of the SDRAM memory organization. Yes, you can use the application note as reference for your design.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Hope it helps!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;BR /&gt;Carlos Mendoza&lt;BR /&gt;Technical Support Engineer&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 04 Jul 2017 16:19:33 GMT</pubDate>
    <dc:creator>Carlos_Mendoza</dc:creator>
    <dc:date>2017-07-04T16:19:33Z</dc:date>
    <item>
      <title>External SDRAM bank selection on LPC407x</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/External-SDRAM-bank-selection-on-LPC407x/m-p/682325#M27449</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I'm currently developing an application using LPC4078FBD208 that will use 3 external &lt;A href="http://www.alliancememory.com/pdf/dram/64m-as4c4m16s.pdf"&gt;AS4C4M16S &lt;/A&gt; SDRAM ICs from Alliance.&lt;/P&gt;&lt;P&gt;I've been following&amp;nbsp;&lt;A href="http://cache.nxp.com/docs/en/application-note/AN10950.pdf"&gt;AN10950&lt;/A&gt;&amp;nbsp;to perform connections between SDRAM and MCU. Example from Fig. 5 on the AN is the most similar with my SDRAM IC pinout. But I have a question on the Address Bus.&lt;/P&gt;&lt;P&gt;I noticed that MCU pins EMC_A[0:23] have been connected to memory address bus and the two bank pins to EMC_A13 and EMC_A14.&lt;/P&gt;&lt;P&gt;My doubt exactly is why EMC_A12 was skipped (A11 from SDRAM is connected to EMC_A11 but BA0 was connected to EMC_A13). There's a particular reason from that? This example is for&amp;nbsp;LPC24XX family but is directly applicable to LPC407x family?&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 03 Jul 2017 17:57:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/External-SDRAM-bank-selection-on-LPC407x/m-p/682325#M27449</guid>
      <dc:creator>otavioborges</dc:creator>
      <dc:date>2017-07-03T17:57:21Z</dc:date>
    </item>
    <item>
      <title>Re: External SDRAM bank selection on LPC407x</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/External-SDRAM-bank-selection-on-LPC407x/m-p/682326#M27450</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Otavio,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;You must use A13 and A14 instead of A12 and A13. The LPC4088 always uses A13/A14 to output the bank select signals, independent of the SDRAM memory organization. Yes, you can use the application note as reference for your design.&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Hope it helps!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Best Regards,&lt;BR /&gt;Carlos Mendoza&lt;BR /&gt;Technical Support Engineer&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 04 Jul 2017 16:19:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/External-SDRAM-bank-selection-on-LPC407x/m-p/682326#M27450</guid>
      <dc:creator>Carlos_Mendoza</dc:creator>
      <dc:date>2017-07-04T16:19:33Z</dc:date>
    </item>
  </channel>
</rss>

