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    <title>LPC Microcontrollers中的主题 Re: Linking all three internal RAM blocks on LPC1857FET256</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Linking-all-three-internal-RAM-blocks-on-LPC1857FET256/m-p/658065#M26153</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jean-Riegardt van Staden,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; You can refer to the lpcopen code lcf file.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Define the SRAM region, then define it together in one range:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17853iF12BD9E6BB2D946C/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17873i12B693EE7E353C5C/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I also attached the icf file for your reference.&lt;/P&gt;&lt;P&gt;Wish it helps you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kerry&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Fri, 05 May 2017 07:04:53 GMT</pubDate>
    <dc:creator>kerryzhou</dc:creator>
    <dc:date>2017-05-05T07:04:53Z</dc:date>
    <item>
      <title>Linking all three internal RAM blocks on LPC1857FET256</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Linking-all-three-internal-RAM-blocks-on-LPC1857FET256/m-p/658064#M26152</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;BLOCKQUOTE class="jive_macro_quote jive-quote jive_text_macro"&gt;&lt;P&gt;Hello&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;I am using the&amp;nbsp;LPC1857FET256 for my project and the datasheet states that it has 136kB for internal SRAM&amp;nbsp;divided into three blocks. One is 64kB, another 32kB and another 40kB. My program is currently running on the 64kB block but I am bordering on the edge of that block and every time I add some code I have to move some variables to external SD Ram because I run out of memory. I can address the other two blocks with a pragma, but this becomes a tedious process to do for each variable, as my project consists of many files. Is there any way I can tel the linker to automatically link up all three these blocks and use them together as one big default block? I have attached the ICF file.&lt;/P&gt;&lt;P style="min-height: 8pt; padding: 0px;"&gt;&amp;nbsp;&lt;/P&gt;&lt;P&gt;Thank you&lt;/P&gt;&lt;P&gt;JR&lt;/P&gt;&lt;/BLOCKQUOTE&gt;&lt;P&gt;&lt;STRONG&gt;Original Attachment has been moved to: &lt;A _jive_internal="true" href="https://community.nxp.com/docs/DOC-337971"&gt;ICF-file.zip&lt;/A&gt;&lt;/STRONG&gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 02 May 2017 10:16:23 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Linking-all-three-internal-RAM-blocks-on-LPC1857FET256/m-p/658064#M26152</guid>
      <dc:creator>jean-riegardtva</dc:creator>
      <dc:date>2017-05-02T10:16:23Z</dc:date>
    </item>
    <item>
      <title>Re: Linking all three internal RAM blocks on LPC1857FET256</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Linking-all-three-internal-RAM-blocks-on-LPC1857FET256/m-p/658065#M26153</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi Jean-Riegardt van Staden,&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; You can refer to the lpcopen code lcf file.&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp; Define the SRAM region, then define it together in one range:&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_1.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17853iF12BD9E6BB2D946C/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_1.png" alt="pastedImage_1.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;span class="lia-inline-image-display-wrapper" image-alt="pastedImage_2.png"&gt;&lt;img src="https://community.nxp.com/t5/image/serverpage/image-id/17873i12B693EE7E353C5C/image-size/large?v=v2&amp;amp;px=999" role="button" title="pastedImage_2.png" alt="pastedImage_2.png" /&gt;&lt;/span&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I also attached the icf file for your reference.&lt;/P&gt;&lt;P&gt;Wish it helps you!&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;&lt;BR /&gt;Have a great day,&lt;BR /&gt;Kerry&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;-----------------------------------------------------------------------------------------------------------------------&lt;BR /&gt;Note: If this post answers your question, please click the Correct Answer button. Thank you!&lt;BR /&gt;-----------------------------------------------------------------------------------------------------------------------&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 05 May 2017 07:04:53 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Linking-all-three-internal-RAM-blocks-on-LPC1857FET256/m-p/658065#M26153</guid>
      <dc:creator>kerryzhou</dc:creator>
      <dc:date>2017-05-05T07:04:53Z</dc:date>
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