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    <title>topic Re: LPC54101 SPI Slave Bytes Received in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54101-SPI-Slave-Bytes-Received/m-p/654938#M26037</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;As slave, if you don't know the exact length the master is going to send you, having SSEL as a pin interrupt to monitor the completion of DMA is the right thing to do. I recall XFERCOUNT field of Channel transfer configuration registers&lt;/P&gt;&lt;P&gt;&amp;nbsp;should be updated when the SSEL interrupt occurs, if you set&amp;nbsp;XFERCOUNT to max to begin with, say "MAX",&amp;nbsp;&amp;nbsp;on completion of SSEL interrupt,&amp;nbsp;XFERCOUNT&amp;nbsp;reading&amp;nbsp;is&amp;nbsp;"x", the number of&amp;nbsp;bytes transfered by DMA is "MAX-x-1".&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 31 Jan 2017 22:55:41 GMT</pubDate>
    <dc:creator>Dezheng_Tang</dc:creator>
    <dc:date>2017-01-31T22:55:41Z</dc:date>
    <item>
      <title>LPC54101 SPI Slave Bytes Received</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54101-SPI-Slave-Bytes-Received/m-p/654937#M26036</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi There,&lt;/P&gt;&lt;P&gt;We have our LPC54101 processor acting as an SPI slave, configured to use DMA. When receiving an SPI frame from the SPI master, we don't know what length of data we will receive, only that it is of a certain maximum length. So we put this maximum length into the XFERCOUNT register, and track the completion of the SPI transfer by monitoring the SPI chip select line.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;We currently do not know how to get the number of bytes actually transferred by the DMA, is there a register we can read to find out this?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Donal&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Mon, 30 Jan 2017 14:40:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54101-SPI-Slave-Bytes-Received/m-p/654937#M26036</guid>
      <dc:creator>dmfen</dc:creator>
      <dc:date>2017-01-30T14:40:05Z</dc:date>
    </item>
    <item>
      <title>Re: LPC54101 SPI Slave Bytes Received</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54101-SPI-Slave-Bytes-Received/m-p/654938#M26037</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;As slave, if you don't know the exact length the master is going to send you, having SSEL as a pin interrupt to monitor the completion of DMA is the right thing to do. I recall XFERCOUNT field of Channel transfer configuration registers&lt;/P&gt;&lt;P&gt;&amp;nbsp;should be updated when the SSEL interrupt occurs, if you set&amp;nbsp;XFERCOUNT to max to begin with, say "MAX",&amp;nbsp;&amp;nbsp;on completion of SSEL interrupt,&amp;nbsp;XFERCOUNT&amp;nbsp;reading&amp;nbsp;is&amp;nbsp;"x", the number of&amp;nbsp;bytes transfered by DMA is "MAX-x-1".&amp;nbsp;&amp;nbsp;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 31 Jan 2017 22:55:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC54101-SPI-Slave-Bytes-Received/m-p/654938#M26037</guid>
      <dc:creator>Dezheng_Tang</dc:creator>
      <dc:date>2017-01-31T22:55:41Z</dc:date>
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