LPC Microcontrollers中的主题 How to determine pipeline refill cycles

How to determine pipeline refill cycles

mikesimmonds — Tue, 25 Oct 2016 08:04:35 GMT

The ARM Cortex M3 Technical Reference Manual R2P1 states ...

P The number of cycles required for a pipeline refill. This ranges from 1 to 3
depending on the alignment and width of the target instruction, and whether the
processor manages to speculate the address early.

So firstly what CPU revision is used in the LPC1313? In case it matters.

But, more importantly, how can we know if the processor speculates the address

early or not and how, numerically, does this effect the pipeline refill.

We know that the Cortex-M3 prefetches 32-bit aligned 32-bit words and we can

lookup the width of the target instruction; but some clarification about cycle counts

(with examples) would be appreciated. [Presumably, we could use the cycle count

display in the debugger to evaluate the alignment and width factors, but the 'speculation'

component need -- detailed -- explanation.]

Background: I want to construct a precisely timed busy loop (in assembler naturally).

Of the order of 2 micro-seconds.

Regards, Mike.

Re: How to determine pipeline refill cycles

Carlos_Mendoza — Fri, 04 Nov 2016 00:51:35 GMT

Hi Mike,

In general, ARM does not document specifics of how their processor works, but you can find information about Speculative branch target fetch in the following thread:

cortex-m3 pipeline stages, branch prediction | ARM Connected Community

Hope it helps!

Best Regards,
Carlos Mendoza
Technical Support Engineer

Re: How to determine pipeline refill cycles

mikesimmonds — Fri, 04 Nov 2016 12:31:48 GMT

Thank you Carlos; this helps.

And I can understand that the internal processor implementation is considered a trade secret.

Cheers, Mike.