LPC MicrocontrollersのトピックRe: Strange UART receive behavior

Strange UART receive behavior

lpcware — Wed, 15 Jun 2016 19:24:26 GMT

Content originally posted in LPCWare by kaldap on Sun Apr 26 11:33:10 MST 2015
Hello all!

I've come into a problem with the UART communication on LPC11C24.
UART periph is correctly initialized and got clock from external 11.0592 MHz xtal.
When the UART is configured for communication at 115200 bauds, everything works like a charm.
Problem begins when I set up 1843200 bauds.
It sends correct data on TXD line and these data are echoed back correctly by counterpart (both checked on logical analyser)
but some gibberish is read from RBR register (even read byte count is not correct).

I've rechecked my board and soldering and found no problem. Even the code seems right (it's modified LpcOpen UART example).
And pin muxing is also set right (checked inside debugger). Am I missing something (e.g. maximum allowed baud rate for reception or another limits)?

Thanks for ideas! I'm starting to think it is chip problem.

Re: Strange UART receive behavior

lpcware — Wed, 15 Jun 2016 19:24:27 GMT

Content originally posted in LPCWare by R2D2 on Sun Apr 26 12:18:13 MST 2015

Quote: kaldap
Am I missing something (e.g. maximum allowed baud rate for reception or another limits)?

Datasheet:

Quote:
7.8.1 Features
• Maximum UART data bit rate of 3.125 Mbit/s.

Of course that the 50MHz main clock value :)

Re: Strange UART receive behavior

lpcware — Wed, 15 Jun 2016 19:24:27 GMT

Content originally posted in LPCWare by kaldap on Sun Apr 26 14:17:26 MST 2015
Well I did not notice this 0:)
But I finally got it working... ;-)

The root of all evil is the

Quote:
Important: If the fractional divider is active (DIVADDVAL > 0) and DLM = 0, the value of
the DLL register must be 3 or greater.

which cannot be met with the 44.2368MHz but correct frequency can be calculated using the baudrate equation.
In this case the Chip_UART_SetBaudrateFDR uses this invalid calculated value and transmission is working fine but reception is not.

So I had to double the main clock and set system divisor to 2 to get into 0-50MHz for MCU and use UART DLL=3/DLM=0 without fractional divider.

Btw Chip_UART_SetBaud has also a bug. It does not return baudrate as stated in commentary but baudrate multiplied by 16.
There should be

Quote:
return clkin / (16 * div);

.
Mentioning it here, don't know where to report LPCOpen bugs 0:)

Thanks!

Re: Strange UART receive behavior

lpcware — Wed, 15 Jun 2016 19:24:28 GMT

Content originally posted in LPCWare by NXP_Support on Tue Apr 28 11:24:00 MST 2015
Hi kaldap,

We found and fixed the fractional divider bug in LPCOpen, so the next release will have the updated code.
Thank you for reporting this!
-NXP Support