topic Re: Inconsistency between the system AHB clock control and UART configuration of LPC112x in LPC Microcontrollers

Inconsistency between the system AHB clock control and UART configuration of LPC112x

lpcware — Wed, 15 Jun 2016 19:23:35 GMT

Content originally posted in LPCWare by tddian on Wed Jul 22 03:53:40 MST 2015
Hello all,

I am using the LPCXpresso1125 board, and there are some potential bugs/inconsistencies about the UART part and the system AHB clock control, both in the driver (lib_lpc_chip_112x) and the user manual (UM10839 for LPC112x, Rev. 1.0)

Firstly this board has three UART0/1/2, stated in page 4, line 1 in the user manual. Table 19 shows that the SYSAHBCLKCTRL supports up to bit 20, where bit 12, 19 and 20 are for enabling clock for UART0, 1 and 2 respectively. On the driver side, in chip.h line 98-100 the three UARTs are also accordingly defined.

On the other hand, in clock_112x.h file line 176-196 where the CHIP_SYSCON_CLOCK_T is defined, the bit 19 and 20 for SYSCON_CLOCK_UART1 and SYSCON_CLOCK_UART2 are missing, which is inconsistent against Table 19. Thereby with this driver library [u]the UART1 clock and UART2 clock are never reachable[/u].
More over, in uart_112x.c line 51-64, the function Chip_UART_Init() is supposed to initialize the given UARTx, but in line 53 it alsways enables the clock for UART0. That is, [u]the UART1 and UART2 will never be correctly initialized[/u] and can't be used at all.

This can be varified by replacing all the "LPC_UART0" to "LPC_UART1" in the example "periph_uart_rb".

Re: Inconsistency between the system AHB clock control and UART configuration of LPC112x

lpcware — Wed, 15 Jun 2016 19:23:36 GMT

Content originally posted in LPCWare by dnsc4f@mst.edu on Fri Aug 14 13:14:27 MST 2015
I noticed the same issues and corrected the driver to the documentation..., are you still having issues with UART1 and UART2?

Re: Inconsistency between the system AHB clock control and UART configuration of LPC112x

lpcware — Wed, 15 Jun 2016 19:23:37 GMT

Content originally posted in LPCWare by dnsc4f@mst.edu on Sat Aug 15 05:01:01 MST 2015
The IOCON registers are all incorrect in iocon_112x.h.

NOTE: (CHIP_IOCON_PIO_T) enum must be rewritten to match the documentation. If you are using the NXP driver, you will be setting the wrong IOCON configuration for UART1 and UART2.

ie.

Change:
IOCON_PIO0_7 = (0x050 >> 2)

to:
IOCON_PIO0_7 = (0x0C8 >> 2),