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    <title>LPC Microcontrollers中的主题 UART0 on LPC11U68</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/UART0-on-LPC11U68/m-p/595566#M22844</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by williamjsell on Fri Nov 20 15:06:37 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am struggling to get the UART0 peripheral to work on the LPC11U68.&amp;nbsp; The problem is getting an interrupt generated when the THR is empty.&amp;nbsp; Should be simple no?&amp;nbsp; To just try a simple test, I have configured the UART0 to send out a single character after being initialized.&amp;nbsp; The nterrupt is called, but the status of the interrupt makes no sense.&amp;nbsp; When I read the IIR status register inside the interrupt:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t status = Chip_UART0_ReadIntIDReg(LPC_USART0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;the value of status is 0xC1.&amp;nbsp; 0x1 indicates "no interrupt pending".&amp;nbsp; I was expecting to see on the INTID a value of 1, to indicate the THR is empty and ready for another byte.&amp;nbsp; This is required to start the state machine running.&amp;nbsp; The 0xC value indicates the FIFO is enabled with 1 character depth.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Any ideas on what is going on?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;bool&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;xMBPortSerialInit(uint32_t ulBaudRate, eMBParity eParity)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;//set debug pin as an output&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; bool&amp;nbsp; bInitialized = pdTRUE;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //UART signals on pins PIO0_14 (FUNC4, U1_TXD) and PIO0_13 (FUNC4, U1_RXD)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //NOTE: The port initialization is not part of the modbus library.&amp;nbsp; This allows other&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //processors to be used with the Modbus library.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, IOP_GETPORTNUM(pindef_CALRXD), IOP_GETPINNUM(pindef_CALRXD), (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, IOP_GETPORTNUM(pindef_CALTXD), IOP_GETPINNUM(pindef_CALTXD), (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_UART0_Init(LPC_USART0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_UART0_SetBaud(LPC_USART0, 115200);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Enable receive data and line status interrupt */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_UART0_IntEnable(LPC_USART0, (UART0_IER_RBRINT | UART0_IER_THREINT));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_UART0_ConfigData(LPC_USART0, (UART0_LCR_WLEN8 | UART0_LCR_SBS_1BIT | UART0_LCR_PARITY_DIS));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Enable UART 0 interrupt */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NVIC_EnableIRQ(USART0_IRQn);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //stop bits are 1 by default, 2 if no parity is used&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //a simple test&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; xMBPortSerialPutByte(0x10);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; return bInitialized;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:23:13 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:23:13Z</dc:date>
    <item>
      <title>UART0 on LPC11U68</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/UART0-on-LPC11U68/m-p/595566#M22844</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by williamjsell on Fri Nov 20 15:06:37 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am struggling to get the UART0 peripheral to work on the LPC11U68.&amp;nbsp; The problem is getting an interrupt generated when the THR is empty.&amp;nbsp; Should be simple no?&amp;nbsp; To just try a simple test, I have configured the UART0 to send out a single character after being initialized.&amp;nbsp; The nterrupt is called, but the status of the interrupt makes no sense.&amp;nbsp; When I read the IIR status register inside the interrupt:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; uint32_t status = Chip_UART0_ReadIntIDReg(LPC_USART0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;the value of status is 0xC1.&amp;nbsp; 0x1 indicates "no interrupt pending".&amp;nbsp; I was expecting to see on the INTID a value of 1, to indicate the THR is empty and ready for another byte.&amp;nbsp; This is required to start the state machine running.&amp;nbsp; The 0xC value indicates the FIFO is enabled with 1 character depth.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Any ideas on what is going on?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;bool&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;xMBPortSerialInit(uint32_t ulBaudRate, eMBParity eParity)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;//set debug pin as an output&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; bool&amp;nbsp; bInitialized = pdTRUE;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //UART signals on pins PIO0_14 (FUNC4, U1_TXD) and PIO0_13 (FUNC4, U1_RXD)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //NOTE: The port initialization is not part of the modbus library.&amp;nbsp; This allows other&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //processors to be used with the Modbus library.&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, IOP_GETPORTNUM(pindef_CALRXD), IOP_GETPINNUM(pindef_CALRXD), (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, IOP_GETPORTNUM(pindef_CALTXD), IOP_GETPINNUM(pindef_CALTXD), (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_UART0_Init(LPC_USART0);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_UART0_SetBaud(LPC_USART0, 115200);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Enable receive data and line status interrupt */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_UART0_IntEnable(LPC_USART0, (UART0_IER_RBRINT | UART0_IER_THREINT));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_UART0_ConfigData(LPC_USART0, (UART0_LCR_WLEN8 | UART0_LCR_SBS_1BIT | UART0_LCR_PARITY_DIS));&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Enable UART 0 interrupt */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NVIC_EnableIRQ(USART0_IRQn);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //stop bits are 1 by default, 2 if no parity is used&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; //a simple test&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; xMBPortSerialPutByte(0x10);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; return bInitialized;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:23:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/UART0-on-LPC11U68/m-p/595566#M22844</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:23:13Z</dc:date>
    </item>
    <item>
      <title>Re: UART0 on LPC11U68</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/UART0-on-LPC11U68/m-p/595567#M22845</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hi,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Got things working? USART0 is different from USART1-4.&lt;/P&gt;&lt;P&gt;Be sure to enable clocks:&lt;/P&gt;&lt;P&gt;Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_IOCON);&lt;/P&gt;&lt;P&gt;Chip_GPIO_Init(LPC_GPIO);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Then:&lt;/P&gt;&lt;P&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, Port, Pin, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN));&lt;/P&gt;&lt;P&gt;Chip_IOCON_PinMuxSet(LPC_IOCON, Port, Pin, (IOCON_FUNC1 | IOCON_MODE_INACT | IOCON_DIGMODE_EN));&lt;/P&gt;&lt;P&gt;//Where Port and pins are dependent on your HW, and FUNC1 is just an assumption too here. See actual table from user manual.&lt;/P&gt;&lt;P&gt;Init:&lt;/P&gt;&lt;P&gt;Chip_UART0_Init(LPC_USART0);&lt;/P&gt;&lt;P&gt;Chip_UART0_SetBaud(LPC_USART0, 115200);&lt;/P&gt;&lt;P&gt;Chip_UART0_ConfigData(LPC_USART0, (UART0_LCR_WLEN8 | UART0_LCR_SBS_1BIT));&lt;/P&gt;&lt;P&gt;Chip_UART0_TXEnable(LPC_USART0);&lt;/P&gt;&lt;P&gt;Chip_UART0_IntEnable(LPC_USART0, UARTN_INTEN_RXRDY);&lt;/P&gt;&lt;P&gt;NVIC_EnableIRQ(USART0_IRQn);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Then inteerupt appears on RX byte.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;In interrupt handler you should do smth like this:&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;IIRValue = LPC_USART0-&amp;gt;IIR;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if(IIRValue &amp;amp; UART0_IIR_INTID_RLS)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; LSRValue = LPC_USART0-&amp;gt;LSR;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (LSRValue &amp;amp; (LSR_OE | LSR_PE | LSR_FE | LSR_RXFE | LSR_BI))&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Dummy = (uint8_t)LPC_USART0-&amp;gt;RBR;&amp;nbsp;&amp;nbsp;&amp;nbsp; // Dummy read on RX to clear interrupt&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; return;&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; if (LSRValue &amp;amp; LSR_RDR)&amp;nbsp;&amp;nbsp;&amp;nbsp; // Receive Data Ready&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; variable = ((uint8_t)LPC_USART0-&amp;gt;RBR);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; else if(IIRValue &amp;amp; UART0_IIR_INTID_RDA)&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; {&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; variable = ((uint8_t)LPC_USART0-&amp;gt;RBR);&lt;/P&gt;&lt;P&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; }&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;BR,&lt;/P&gt;&lt;P&gt;Ergo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Fri, 29 Jul 2016 19:14:01 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/UART0-on-LPC11U68/m-p/595567#M22845</guid>
      <dc:creator>sirurx</dc:creator>
      <dc:date>2016-07-29T19:14:01Z</dc:date>
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