topic Re: [SOLVED] Accessing CLK_USB0_CFG crashes core in LPC Microcontrollers

[SOLVED] Accessing CLK_USB0_CFG crashes core

lpcware — Wed, 15 Jun 2016 19:21:26 GMT

Content originally posted in LPCWare by chris_bayley_trimble on Wed Jan 07 17:50:22 MST 2015
I'm having a very frustrating time with the USB_CLK registers. Any access to any of the 4 USB CLK registers (CLK_USB0_CFG:0x40051800, CLK_USB0_STAT:0x40051804, CLK_USB1_CFG:0x40051900, & CLK_USB1_STAT:0x40051904) causes my 4357 (I've also tried a 4330) to become unresponsive and loose comms with the debugger. I can access the adjacent CLK control registers at 0x40051700 and 0x40051a00 without issue.

the code below demonstrates the problem:

    volatile uint32_t* ptr;
    volatile uint32_t val;

    // This works
    ptr = (uint32_t*)0x40051700; //CLK_PERIPH_BUS config
    val = *ptr;
    // This works
    ptr = (uint32_t*)0x40051704; //CLK_PERIPH_BUS status
    val = *ptr;
    // This works
    ptr = (uint32_t*)0x40051A00; //CLK_SPI_CFG
    val = *ptr;

    // This crashes the debugger/core
    ptr = (uint32_t*)0x40051800; //CLK_USB0 config
    val = *ptr;
    // This crashes the debugger/core
    ptr = (uint32_t*)0x40051804; //CLK_USB0 status
    val = *ptr;
    // This crashes the debugger/core
    ptr = (uint32_t*)0x40051900; //CLK_USB1 config
    val = *ptr;
    // This crashes the debugger/core
    ptr = (uint32_t*)0x40051904; //CLK_USB1 status
    val = *ptr;

It is also true that I cannot access that memory via the debugger, if I add the expression

*0x40051800

to expressions windows I will loose connection to the target immediately.

I have tried the access first thing before board init and later on after USB is already running, the result is always the same.
I have scanned the errata for the 43xx but can find nothing relevant.

Help !

Cheers,
Chris

Re: [SOLVED] Accessing CLK_USB0_CFG crashes core

lpcware — Wed, 15 Jun 2016 19:21:26 GMT

Content originally posted in LPCWare by lpcxpresso-support on Thu Jan 08 04:35:03 MST 2015
In order to the access the CLK_USB0_xxx and CLK_USB1_xxx peripheral registers, I think that you need to have the PLL0_USB clock active. In PLL0USB_CTRL, check it is powered up (PD=0), and the output is enabled (CLKEN=1).

Regards,
LPCXpresso Support

Re: [SOLVED] Accessing CLK_USB0_CFG crashes core

lpcware — Wed, 15 Jun 2016 19:21:27 GMT

Content originally posted in LPCWare by chris_bayley_trimble on Thu Jan 08 14:05:29 MST 2015
Thank you for your reply.

Your advice sounded promising and we had been thinking along those lines, but unfortunately it does not yet resolve the issue.
Even after enabling the PLL0_USB accessing CLK_USB0/1 still crashes the core.

    ptr = (uint32_t*)0x40050020; //PLL0USB_CTRL
    val = *ptr;                               // val = 0x01000003
    val &= ~0x01;                        // PD = 0
    val |= 0x10;                           // CLKEN = 1
    *ptr = val;                              // val = 0x01000012

    // This STILL crashes the debugger/core
    ptr = (uint32_t*)0x40051800; //CLK_USB0 config
    val = *ptr;

What other conditions do we need to ensure ?

Regards,
Chris

Re: [SOLVED] Accessing CLK_USB0_CFG crashes core

lpcware — Wed, 15 Jun 2016 19:21:28 GMT

Content originally posted in LPCWare by DF9DQ on Thu Jan 08 15:48:07 MST 2015
0x01000012 is the very value that got it working for me.

This is what I did:
[list]
[*]SYSRESET the device, and let it run through the boot code up to the reset vector of the application in flash. That is, no instruction of my application code has been run yet, and the device is supposed to be in a pristine state with no side effect of any debugger script.
[*]Use the debugger to power up the PLL0_USB, and enable its output (PD=0, CLKEN=1).
[*]It's only now that I open a memory view containing the registers CLK_USB0_CFG etc. If I had opened that memory view before enabling the PLL, it would indeed have crashed the debugger just as you described.
[/list]

I have not double-checked that the CPU now also has access to the registers in question, but I have no good reason to doubt that.

Re: [SOLVED] Accessing CLK_USB0_CFG crashes core

lpcware — Wed, 15 Jun 2016 19:21:28 GMT

Content originally posted in LPCWare by chris_bayley_trimble on Sun Jan 11 15:01:22 MST 2015
I have found that the key to my troubles was that in addition to needing to follow the advice above, BASE_USB0_CLK and/or BASE_USB1_CLK must be enabled before any other USB clock config registers are accessible without locking up the core.
Thanks all for the help!
Cheers,
C