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    <title>LPC MicrocontrollersのトピックRe: EMC/SRAM speed</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/EMC-SRAM-speed/m-p/592514#M22373</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MikeSimmonds on Sun Aug 09 23:14:10 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Obviously, the selected RAM devices must be suitable for the speed at which they are accessed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;But the speed of the EMC peripheral itself must be considered also.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;See the datasheet (not user manual) for the maximum rate supported.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;E.g. On the LPC1778/1788, the CPU max is 120 MHz, but the EMC is only 80 MHz.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Given the limited clock divisors permited for the EMC, one can limit the CPU to 80 Mhz or run the CPU at full speed and set the EMC&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;to 60 MHz (half the CPU speed).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;There are probably similar constraints for the 43xx series. I haven't looked.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cheers, Mike.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:20:16 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:20:16Z</dc:date>
    <item>
      <title>EMC/SRAM speed</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/EMC-SRAM-speed/m-p/592513#M22372</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by inspire on Sun Aug 09 15:13:37 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I want to use the LPC4337 with EMC+32 bit asynchronous SRAM but I can't figure out what the maximum frequency of the SRAM has to be for full performance. The LPC runs with 204 MHz. Do I need a SRAM that with the same frequency or what is the optimum frequency/access time of the SRAM? &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;In special, ISSI produces many SRAMs with a speed of 8 ns. Since 1/(204MHz) = 4.9 ns this value of 8 ns seems to be too big - or is the SRAM frequency for the LPC somewhere below?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;inspire&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:20:15 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/EMC-SRAM-speed/m-p/592513#M22372</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:20:15Z</dc:date>
    </item>
    <item>
      <title>Re: EMC/SRAM speed</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/EMC-SRAM-speed/m-p/592514#M22373</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MikeSimmonds on Sun Aug 09 23:14:10 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Obviously, the selected RAM devices must be suitable for the speed at which they are accessed.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;But the speed of the EMC peripheral itself must be considered also.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;See the datasheet (not user manual) for the maximum rate supported.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;E.g. On the LPC1778/1788, the CPU max is 120 MHz, but the EMC is only 80 MHz.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Given the limited clock divisors permited for the EMC, one can limit the CPU to 80 Mhz or run the CPU at full speed and set the EMC&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;to 60 MHz (half the CPU speed).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;There are probably similar constraints for the 43xx series. I haven't looked.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cheers, Mike.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:20:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/EMC-SRAM-speed/m-p/592514#M22373</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:20:16Z</dc:date>
    </item>
    <item>
      <title>Re: EMC/SRAM speed</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/EMC-SRAM-speed/m-p/592515#M22374</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by inspire on Mon Aug 10 01:30:24 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Mike,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;this makes sense, now I understand a similar paragraph for the LPC4337! Thanks a lot!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;inspire&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:20:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/EMC-SRAM-speed/m-p/592515#M22374</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:20:16Z</dc:date>
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