LPC Microcontrollers中的主题 Re: About Using Segger JLink for LPC43XX Dual Core Debugging https://community.nxp.com/t5/LPC-Microcontrollers/About-Using-Segger-JLink-for-LPC43XX-Dual-Core-Debugging/m-p/591472#M22227 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by bavarian on Tue Sep 24 04:06:04 MST 2013</STRONG><BR /><SPAN>The JLINK V7.0 and higher should behave the same way as the ULINK2 with regards to dual core debugging.</SPAN><BR /><SPAN>We are not talking about "simulation" right? It's a debugger connection to a real target board (KEIL µVision debugger connected via a JLINK box to an LPC4300 board).</SPAN><BR /><SPAN>If you open two instances of µVision you can make in each instance individual settings for the JTAG connection to the Cortex-M4 and the M0 core.</SPAN><BR /><SPAN>You only need to select the cores and take care of the reset type (see attached pictures).</SPAN><BR /><BR /><SPAN>Regards,</SPAN><BR /><SPAN>NXP Support</SPAN></BODY></HTML> Wed, 15 Jun 2016 19:18:08 GMT lpcware 2016-06-15T19:18:08Z About Using Segger JLink for LPC43XX Dual Core Debugging https://community.nxp.com/t5/LPC-Microcontrollers/About-Using-Segger-JLink-for-LPC43XX-Dual-Core-Debugging/m-p/591471#M22226 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by slonst on Mon Sep 23 04:35:30 MST 2013</STRONG><BR /><SPAN>&nbsp;&nbsp; Asking Document for LPC4300 dual-core debugging based on JLink simulator, I succeed to use&nbsp; ULink simulator for LPC4300 dual-core simulation, but I fail to use JLink simulators for dual-core simulation. I don't know how to configure JLink for this simulation, please give me a Document or a guidance.</SPAN></BODY></HTML> Wed, 15 Jun 2016 19:18:07 GMT https://community.nxp.com/t5/LPC-Microcontrollers/About-Using-Segger-JLink-for-LPC43XX-Dual-Core-Debugging/m-p/591471#M22226 lpcware 2016-06-15T19:18:07Z Re: About Using Segger JLink for LPC43XX Dual Core Debugging https://community.nxp.com/t5/LPC-Microcontrollers/About-Using-Segger-JLink-for-LPC43XX-Dual-Core-Debugging/m-p/591472#M22227 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by bavarian on Tue Sep 24 04:06:04 MST 2013</STRONG><BR /><SPAN>The JLINK V7.0 and higher should behave the same way as the ULINK2 with regards to dual core debugging.</SPAN><BR /><SPAN>We are not talking about "simulation" right? It's a debugger connection to a real target board (KEIL µVision debugger connected via a JLINK box to an LPC4300 board).</SPAN><BR /><SPAN>If you open two instances of µVision you can make in each instance individual settings for the JTAG connection to the Cortex-M4 and the M0 core.</SPAN><BR /><SPAN>You only need to select the cores and take care of the reset type (see attached pictures).</SPAN><BR /><BR /><SPAN>Regards,</SPAN><BR /><SPAN>NXP Support</SPAN></BODY></HTML> Wed, 15 Jun 2016 19:18:08 GMT https://community.nxp.com/t5/LPC-Microcontrollers/About-Using-Segger-JLink-for-LPC43XX-Dual-Core-Debugging/m-p/591472#M22227 lpcware 2016-06-15T19:18:08Z