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    <title>topic Re: ISP and Boot modes in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591267#M22200</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Hydron on Mon Nov 04 19:22:48 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;We had the same problem, and ended up using UART3 as a boot UART instead - it doesn't have the nice ISP features but you can load programs into ram to extend it's functionality. To get into this mode we had a simple circuit to change the boot source resistors from SPIFI to UART3 when a certain button was pressed at power-on. Somewhere on the LPC43xx or LPC18xx forums is a useful little bootloader a Japanese guy wrote which you can load using the UART boot method and then emulate the ISP functions, as well as program SPIFI flash.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This is quite an irritating design decision by NXP - please think about the pin conflicts for these two important functions next time!&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:18:11 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:18:11Z</dc:date>
    <item>
      <title>ISP and Boot modes</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591264#M22197</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by sasa.bremec on Mon Oct 28 02:26:30 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;In design process of our new product and reading LPC43xx manual I've found a notation about ISP programing mode using UART0 that it is not clear.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Table 4 (pg. 65) &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;If the chip is booted from the device connected to USART0 pins P2_0 (Tx) and P2_1 (Rx) &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Question is P2_0 is located as T16 pin and P2_1 as N15, what happens if I connect USART0 Rx and Tx signals to the different location (A2 and A3) will the ISP boot still OK ???&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks, Sasa&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:18:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591264#M22197</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:18:09Z</dc:date>
    </item>
    <item>
      <title>Re: ISP and Boot modes</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591265#M22198</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by tha on Tue Oct 29 19:11:56 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;No, that will not work.&amp;nbsp; The ISP mode will map the UART0 pins to its default pins, in this case P2.0 and P2.1&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:18:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591265#M22198</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:18:09Z</dc:date>
    </item>
    <item>
      <title>Re: ISP and Boot modes</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591266#M22199</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by sasa.bremec on Mon Nov 04 02:18:13 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Tha,&amp;nbsp; thanks for the answer.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This is what I was afraid of, pins P2.0 (T16) and P2.1 (N15) are the only posibility for the EMC A12 and A13 signals. :(&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Anyway I will try to solve this.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks Sasa&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:18:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591266#M22199</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:18:10Z</dc:date>
    </item>
    <item>
      <title>Re: ISP and Boot modes</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591267#M22200</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Hydron on Mon Nov 04 19:22:48 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;We had the same problem, and ended up using UART3 as a boot UART instead - it doesn't have the nice ISP features but you can load programs into ram to extend it's functionality. To get into this mode we had a simple circuit to change the boot source resistors from SPIFI to UART3 when a certain button was pressed at power-on. Somewhere on the LPC43xx or LPC18xx forums is a useful little bootloader a Japanese guy wrote which you can load using the UART boot method and then emulate the ISP functions, as well as program SPIFI flash.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This is quite an irritating design decision by NXP - please think about the pin conflicts for these two important functions next time!&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:18:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591267#M22200</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:18:11Z</dc:date>
    </item>
    <item>
      <title>Re: ISP and Boot modes</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591268#M22201</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Is there a solution or work-around for this USART0 and EMC_A12/A13 pin conflict these days? &amp;nbsp;Thank you.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 May 2017 21:03:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/ISP-and-Boot-modes/m-p/591268#M22201</guid>
      <dc:creator>floydlau</dc:creator>
      <dc:date>2017-05-09T21:03:40Z</dc:date>
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