topic Re: LPC4357 M0 Core Enthernet DMA Problem in LPC Microcontrollers

LPC4357 M0 Core Enthernet DMA Problem

lpcware — Wed, 15 Jun 2016 19:16:32 GMT

Content originally posted in LPCWare by Rsing.Yang on Wed May 28 23:22:19 MST 2014
Hi guys!

I have successfully run FreeRTOS + LwIP + TFTP on lpc4357 M4 Core.And now I am trying to run LwIP on M0 Core.
I use the same driver that works perfectly on M4 to drive M0.Everything seems to be ok at the initialization process.
But after that , M0 is Interrupted by the reason of Receive Overflow repetitively.

I want to know what does Receive Overflow mean ? And what will possibly cause this interrupt?
I am glad to offer more information about my question if it may help.

Hope for your help &Thanks in advanced!

Best Regards

Rising.Yang

Re: LPC4357 M0 Core Enthernet DMA Problem

lpcware — Wed, 15 Jun 2016 19:16:33 GMT

Content originally posted in LPCWare by TheFallGuy on Thu May 29 07:35:07 MST 2014
I would guess that either:
1. Your receive interrupt is not being triggered (perhaps it is a different name on the M0, or requires different setup?), or
2. You are not able to service the interrupts quickly enough. The M0 is slower than the M4.

To help any further you would need to post your code.

Re: LPC4357 M0 Core Enthernet DMA Problem

lpcware — Wed, 15 Jun 2016 19:16:34 GMT

Content originally posted in LPCWare by Rsing.Yang on Thu May 29 20:41:33 MST 2014
Thank you for the reply.

The code below is the ISR of M0 Enternet interrupt.

I use a globle variable _ints_ to record the value of DMA_STAT register .
                            _ints_ = 0x8010

That means bit:DMA_ST_OVF & bit:AIS of DMA_STAT register is set.But I don't know why and how this happens.
Is there any register that needs a special setting?Because I use the same setting as M4(Including device initialization/register setting/ISR). The most difference is they use different IRQ number and IRQ priority.

Do I need to run the initial funtcion in M4 ?
/**
* @briefEMAC interrupt handler
* @returnNothing
* @noteThis function handles the transmit, receive, and error interrupt of
* the LPC118xx/43xx. This is meant to be used when NO_SYS=0.
*/
#ifdef CORE_M0
void M0_ETH_IRQHandler(void)
#else
void ETH_IRQHandler(void)
#endif
{
signed portBASE_TYPE xRecTaskWoken = pdFALSE, XTXTaskWoken = pdFALSE;
uint32_t ints;
extern uint32_t _ints_;   //a globle value

/* Get pending interrupts */
ints = LPC_ETHERNET->DMA_STAT;
_ints_ = ints;     //record the value of DMA_STAT
/* RX group interrupt(s) */
if (ints & (DMA_ST_RI | DMA_ST_OVF | DMA_ST_RU)) {
/* Give semaphore to wakeup RX receive task. Note the FreeRTOS
   method is used instead of the LWIP arch method. */
xSemaphoreGiveFromISR(lpc_enetdata.RxSem, &xRecTaskWoken);
}

/* TX group interrupt(s) */
if (ints & (DMA_ST_TI | DMA_ST_UNF | DMA_ST_TU)) {
/* Give semaphore to wakeup TX cleanup task. Note the FreeRTOS
   method is used instead of the LWIP arch method. */
xSemaphoreGiveFromISR(lpc_enetdata.TxCleanSem, &XTXTaskWoken);
}

/* Clear pending interrupts */
LPC_ETHERNET->DMA_STAT = ints;

ints = LPC_ETHERNET->DMA_CURHOST_REC_BUF;

/* Context switch needed? */
portEND_SWITCHING_ISR(xRecTaskWoken || XTXTaskWoken);
}