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    <title>LPC MicrocontrollersのトピックRe: LPC4357 M4 code in RAM</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587115#M21559</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pgeloso on Mon Jun 15 07:09:25 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you for your interest, "TheFallGuy"!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Yes, it's hard fall. The debugger stops and I can't execute the lines after the "iap-erase" line.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Bye!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Pietro&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:11:46 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:11:46Z</dc:date>
    <item>
      <title>LPC4357 M4 code in RAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587113#M21557</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pgeloso on Mon Jun 15 06:43:58 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm trying to run a function from RAM in M4 core.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm using LPCXpresso 7.8.0 and an EA-LPC4357 eval board.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This function performs the erase of sector 0 Flash A. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;If the code in RAM has no "links" with Flash A and there are no interrupts, it should run..but, actually, it crashes as soon as I try to erase sector 0 of Flash A.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;...I don't understand why. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Note:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- I'm not using interrupts&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- I left 32Bytes of stack offset. to use IAP&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- I initialize IAP before using it&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- I placed the routine routine into RAM&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Here the simple code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;

#include "board.h"

#include &amp;lt;cr_section_macros.h&amp;gt;

#include "iap_18xx_43xx.h"

//IAP: Settings .. -&amp;gt;.. stack offset=32
// Initialize IAP before using it
// Erase sector 0 from RAM

#define IAP_INIT_CMD 49

void Chip_IAP_Initialise(void)
{
uint32_t command[5], result[4];

command[0] = IAP_INIT_CMD;
iap_entry(command, result);
}



__RAMFUNC(RAM) void ram_fw_upgrade(void){

int i;
uint32_t n_sector=0;//we start writing data in this sector
uint32_t command[5], result[4];


 __disable_irq();

 // prepare sector 0
 command[0] = IAP_PREWRRITE_CMD;
 command[1] = n_sector;
 command[2] = n_sector;
 command[3] = 0;//flashBank A
 iap_entry(command, result);

 //erase sector 0
command[0] = IAP_ERSSECTOR_CMD;
command[1] = n_sector;
command[2] = n_sector;
command[3] = SystemCoreClock / 1000;
 command[4] = 0;//flashBank A
 iap_entry(command, result);&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; //----&amp;gt;crash!!

for(i=0;i&amp;lt;1000000;i++);//wait..do something in RAM

 __enable_irq();

 return;
}







int main(void) {
int i=0;
void (*longfunc)(void) = &amp;amp;ram_fw_upgrade;

&amp;nbsp;&amp;nbsp;&amp;nbsp; SystemCoreClockUpdate();
 //&amp;nbsp;&amp;nbsp; Board_Init();
 //&amp;nbsp;&amp;nbsp; Board_LED_Set(0, true);
&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Board_UART_Init(0);//doing nothing, but it's needed, or it will not compile

&amp;nbsp;&amp;nbsp;&amp;nbsp; Chip_IAP_Initialise();

&amp;nbsp;&amp;nbsp;&amp;nbsp; if(i!=0){ //just for safety..we enter here only manually, during debug..
&amp;nbsp;&amp;nbsp;&amp;nbsp; (*longfunc)();//&amp;nbsp; running from RAM
&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp;&amp;nbsp; while(1) {
&amp;nbsp;&amp;nbsp;&amp;nbsp; i++;
&amp;nbsp;&amp;nbsp;&amp;nbsp; }
&amp;nbsp;&amp;nbsp;&amp;nbsp; return 0 ;
}


&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:11:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587113#M21557</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:11:44Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4357 M4 code in RAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587114#M21558</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by TheFallGuy on Mon Jun 15 07:04:34 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;What do you mean by "crashes"? What *really* happens? HardFault?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:11:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587114#M21558</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:11:45Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4357 M4 code in RAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587115#M21559</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pgeloso on Mon Jun 15 07:09:25 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you for your interest, "TheFallGuy"!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Yes, it's hard fall. The debugger stops and I can't execute the lines after the "iap-erase" line.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Bye!&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Pietro&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:11:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587115#M21559</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:11:46Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4357 M4 code in RAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587116#M21560</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by TheFallGuy on Mon Jun 15 07:57:29 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;So, debug the Hard Fault (hint - there is a FAQ for this). Or as a minimum, give as a clue as to details on the hard fault.I've got good eyesight, but I can't read your screen from here...&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:11:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587116#M21560</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:11:46Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4357 M4 code in RAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587117#M21561</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pgeloso on Mon Jun 15 08:51:49 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Intersting thing,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I didn't know about the hardfault debug.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Unfortunately, for me, it's quite criptic. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The fail happens at the aiap command line&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;iap_entry(command, result);&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;and it seems vectpc register is addressing this issue..but ??.. do you have suggestions?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm attaching the screen shot.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Pietro&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:11:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587117#M21561</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:11:47Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4357 M4 code in RAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587118#M21562</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by LessThanZero on Mon Jun 15 11:54:16 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What address are you using as the IAP entry point? Is the thumb bit set?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:11:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587118#M21562</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:11:48Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4357 M4 code in RAM</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587119#M21563</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pgeloso on Tue Jun 16 00:40:01 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;the IAP address is inside a library of LPCOpne of LPCXpresso (lpc_chip_43xx): I think it's correct and it's pointing to the ROM.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Pointer to ROM IAP entry functions */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;#define IAP_ENTRY_LOCATION&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; (*((uint32_t *) 0x10400100))&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;static INLINE void iap_entry(unsigned int cmd_param[], unsigned int status_result[])&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;((IAP_ENTRY_T) IAP_ENTRY_LOCATION)(cmd_param, status_result);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;IAP works fine, the problem is only related to sector 0.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Sorry, I don't understand what you mean with "!thumb bit set"..could you please explain it?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Tbnaks&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Pietro&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:11:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4357-M4-code-in-RAM/m-p/587119#M21563</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:11:48Z</dc:date>
    </item>
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