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    <title>LPC MicrocontrollersのトピックNeed clarification on Errata SPIFI.1.</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Need-clarification-on-Errata-SPIFI-1/m-p/582335#M20648</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DPeters on Thu Mar 08 09:50:13 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm bootloading from a QSPI device using SPIFI and running the application on SRAM.&amp;nbsp; If a reset is performed, Errata SPIFI.1 results in needing two successive resets before the image is successfully bootloaded via spifi.&amp;nbsp; The work-around is to remove the QSPI device from no-opcode mode before resetting CPU.&amp;nbsp; I haven't found any hints in the user manual or SPIFI_ROM_API.h files on how to do this.&amp;nbsp; I'm guessing there's a bit in the SPIFIopers structure than can be set when initializing using the spifi_init() call.&amp;nbsp; Has anyone done this? &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:06:20 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:06:20Z</dc:date>
    <item>
      <title>Need clarification on Errata SPIFI.1.</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Need-clarification-on-Errata-SPIFI-1/m-p/582335#M20648</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DPeters on Thu Mar 08 09:50:13 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm bootloading from a QSPI device using SPIFI and running the application on SRAM.&amp;nbsp; If a reset is performed, Errata SPIFI.1 results in needing two successive resets before the image is successfully bootloaded via spifi.&amp;nbsp; The work-around is to remove the QSPI device from no-opcode mode before resetting CPU.&amp;nbsp; I haven't found any hints in the user manual or SPIFI_ROM_API.h files on how to do this.&amp;nbsp; I'm guessing there's a bit in the SPIFIopers structure than can be set when initializing using the spifi_init() call.&amp;nbsp; Has anyone done this? &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:06:20 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Need-clarification-on-Errata-SPIFI-1/m-p/582335#M20648</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:06:20Z</dc:date>
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    <item>
      <title>Re: Need clarification on Errata SPIFI.1.</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Need-clarification-on-Errata-SPIFI-1/m-p/582336#M20649</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by ktownsend on Sun Mar 11 18:37:31 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;DPeters:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I think until this errata is fixed, the most reliable means to work around this is probably a HW solution for the double-reset.&amp;nbsp; You can configure the SPI flash before doing an intentional reset, but unfortunately that doesn't taken into account every situation.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:06:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Need-clarification-on-Errata-SPIFI-1/m-p/582336#M20649</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:06:21Z</dc:date>
    </item>
    <item>
      <title>Re: Need clarification on Errata SPIFI.1.</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Need-clarification-on-Errata-SPIFI-1/m-p/582337#M20650</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DPeters on Mon Mar 19 09:38:18 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Yes, the unexpected reset is the concern, where I need to ensure the program is properly bootloaded.&amp;nbsp; I've discovered a solution whereby all SPIFI operations are encapsulated in routines that have wrapper calls.&amp;nbsp; Basically the SPIFI is enabled only during the routine, then disabled afterwards.&amp;nbsp; As long as the reset happens outside of the SPIFI routine, the SPIFI will successfully bootload after the reset.&amp;nbsp; To do this, add the following routine declarations to the spifi_rom_aph.h file:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void set_mem_mode (SPIFIobj *obj);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;void cancel_mem_mode (SPIFIobj *obj);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Before any SPIFI operation, call set_mem_mode().&amp;nbsp; When done, call cancel_mem_mode().&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;NOTE:&amp;nbsp; Memory mapped spifi address reads/writes are off-limits following a cancel_mem_mode() call, otherwise a hard-fault occurs. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;There is still a chance a reset will happen between the time set_mem_mode() and cancel_mem_mode() are called, and thus a double reset would still be needed, but I think this is the best that can be done with the current errata.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:06:21 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Need-clarification-on-Errata-SPIFI-1/m-p/582337#M20650</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:06:21Z</dc:date>
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