<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
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    <title>topic Re: Urgent help - CRP on LPC4357 in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581901#M20554</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by starblue on Mon Mar 16 14:23:22 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;No, the M0 will be kept in reset until the M4 releases it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;But maybe the M4 ist starting from the other memory bank, for whatever reason.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:05:05 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:05:05Z</dc:date>
    <item>
      <title>Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581896#M20549</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DT1 on Mon Mar 16 08:43:55 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm currently having a problem making the CRP work and I'm production...&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I though it was working correctly, but it seems not.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm not sure how I must activate CRP. I'm using :&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;- IAR&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- J-Link&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- LPC4357 Flash Bank A : Secondary bootloader + User application &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- LPC4357 Flash Bank B : Utility User application&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What I tried so far :&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- Generate my bootloader.bin that will be written at address 0x1A000000. After generation, using JFlash, I manually modify address 0x1A0002FC to enable CRP1 (0x12345678)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- Power cycle&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;- Try to read back the chip memory using JFlash : working (and should not)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What am I doing wrong ? What's the best way to enable CRP using my setup ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks !!!&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581896#M20549</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:02Z</dc:date>
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    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581897#M20550</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by riccardoventrella on Mon Mar 16 09:17:11 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt; This is a very interesting question, which could help me as well.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; I'd like to use CRP on a almost new 43S37 MCU.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; Where did you find information on how to set CRP on 4357? I mean: is to set a secondary boot loader the only&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;way to enable CRP?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; I know 43S37 has some useful AES features for boot crypting. I wonder is anyone is able to tell me where informations&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; to properly set use it on a 43S37 MCU.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; Thanks&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581897#M20550</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:03Z</dc:date>
    </item>
    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581898#M20551</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by TheFallGuy on Mon Mar 16 11:09:38 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;- Generate my bootloader.bin that will be written at address 0x1A000000. After generation, using JFlash, I manually modify address 0x1A0002FC to enable CRP1 (0x12345678)&lt;BR /&gt;- Power cycle&lt;BR /&gt;- Try to read back the chip memory using JFlash : working (and should not)&lt;BR /&gt;&lt;BR /&gt;What am I doing wrong ? What's the best way to enable CRP using my setup ?&lt;BR /&gt;&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What does 0x1a0002fc read as?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Are you sure you are booting from that Flash?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581898#M20551</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:04Z</dc:date>
    </item>
    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581899#M20552</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by TheFallGuy on Mon Mar 16 11:12:38 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;is to set a secondary boot loader the onlyway to enable CRP?&lt;BR /&gt;&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;SPAN&gt;No. See 6.6 of the LPC43xx User Manual (UM10503.pdf)&lt;/SPAN&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;I know 43S37 has some useful AES features for boot crypting. I wonder is anyone is able to tell me where informations&lt;BR /&gt;to properly set use it on a 43S37 MCU.&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This is described in Chapter 7: LPC43xx Boot ROM for secure parts of UM10503.pdf&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581899#M20552</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:04Z</dc:date>
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    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581900#M20553</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DT1 on Mon Mar 16 12:17:46 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;When I read back using JFlash, I can see that I have 0x12345678 at 0x1A0002FC&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Your second question is interesting... I've always had in mind that I was booting my M4 first, but now I'm wondering. The thing is that if I only program my secondary bootloader (which is located on the M4, 0x1A000000), I can see my LED blink on my board, meaning that it's running.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Could the M0 be the one starting ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;If the M0 is starting, then starts the M4 and then goes to reset, must I have 0x1B0002FC at 0x12345678 AND 0x1A0002FC to be secure ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581900#M20553</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:05Z</dc:date>
    </item>
    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581901#M20554</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by starblue on Mon Mar 16 14:23:22 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;No, the M0 will be kept in reset until the M4 releases it.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;But maybe the M4 ist starting from the other memory bank, for whatever reason.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581901#M20554</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:05Z</dc:date>
    </item>
    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581902#M20555</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DT1 on Mon Mar 16 15:18:42 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;ok, I found what my problem was. Somewhere in the code, I found a "no_init" call to the CRP memory region, so that's why I wasn't able to correctly generate my .bin. After commenting this, my generated .bin contained the correct values (different endianess ??) :&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Value forced : 0x12345678&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Value in JFlash when opening the .bin : 0x78 56 34 12&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;After programming my .bin, I lost access to the board via JTAG. And I was able to flash my applications using the bootloader, which is what I need. I'm now at the point to test with Flash Magic if it's locked correctly.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581902#M20555</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:06Z</dc:date>
    </item>
    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581903#M20556</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by riccardoventrella on Tue Mar 17 08:37:10 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; Thanks for the pdf,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; I finally found it before your answer, nevertheless you answer was really helpful in addressing me&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; to the proper chapters.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; Since I've found so many CRP experts thank to this post, I'd like to post you some related question, if possible.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; 1) my aim is to avoid other people cloning flash code. As far as I can have understood, to achieve this it should&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; be enough to use CRP, i.e. using "simply" 4337 instead of 43S37.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Since I don't need to use AES, I think CRP should by far enough, isn't it?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; 2) reading from page 68 of the UM10503.pdf, I had some problem in understanding fully the CRP3 level description:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; "This mode effectively disables ISP override using the P2_7 pin. It is up to the user’s&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; application to provide for flash updates by using IAP calls or by invoking ISP. Caution:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; If CRP3 is selected, no future fact ory testing can be performed on the device"&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; So, does this mean the flash is no more readable at all, neither the JTAG would be, but we can STILL&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; flash firmware updates through ISP or IAP?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; Thanks&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581903#M20556</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:06Z</dc:date>
    </item>
    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581904#M20557</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by DT1 on Tue Mar 17 11:06:30 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Ok, so I managed to take control via Flash Magic. After some testing, I found out a flaw (I think)...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;My boot flash is Bank A. So I put 0x12345678 (CRP1) at 0x1A0002FC. All is fine, I can't read back Bank A and Bank B from Flash Magic or JTAG. In Flash Magic, I erase Bank A and power cycle.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I can now read Bank B from JTAG and Flash Magic.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I tried to put CRP1 at 0x1B0002FC also, no change. So it is possible to steal code from the other Flash Bank... Or I'm missing something ?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581904#M20557</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:07Z</dc:date>
    </item>
    <item>
      <title>Re: Urgent help - CRP on LPC4357</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581905#M20558</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by riccardoventrella on Tue Mar 17 13:27:24 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; Hi DT1,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; your problem addresses as well another doubt of mine.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; Let's take to have 2 banks of 512Kb each, like happening on the 4337 MCU I'd like to use.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; It seems to what I've read, it would be possible to hide only one flash bank each time, from&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; what you are reporting.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; But, if my code is lasting, for instance, 700Kb or so, encompassing in 2 banks as whole, how&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; I could hide the 2 banks altogether?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; Is the point you are addressing as well?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt; Thanks&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Urgent-help-CRP-on-LPC4357/m-p/581905#M20558</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:08Z</dc:date>
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  </channel>
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