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    <title>topic Re: SSP DMA, rx buffer stays empty in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/SSP-DMA-rx-buffer-stays-empty/m-p/579935#M20157</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I just found out I made a stupid mistake.&lt;/P&gt;&lt;P&gt;It was solved by removing the &amp;amp; in front of my buffers.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The following changes results in a working DMA on ssp:&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_macro_code jive_text_macro _jivemacro_uid_1470731654443698" data-hasrefreshed="true" data-renderedposition="108_8_1192_32" jivemacro_uid="_1470731654443698"&gt;&lt;P&gt;dma_txconfig.SrcMemAddr = (uint32_t)txbuf;&lt;/P&gt;&lt;P&gt;dma_rxconfig.DstMemAddr = (uint32_t)rxbuf;&lt;/P&gt;&lt;/PRE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Tue, 09 Aug 2016 08:35:09 GMT</pubDate>
    <dc:creator>gvandenbosch</dc:creator>
    <dc:date>2016-08-09T08:35:09Z</dc:date>
    <item>
      <title>SSP DMA, rx buffer stays empty</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SSP-DMA-rx-buffer-stays-empty/m-p/579934#M20156</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;Hello,&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I am trying to get the SSP running with DMA on the LPC4357.&lt;/P&gt;&lt;P&gt;For this I configured 1 DMA channel for TX and 1 &lt;SPAN style="line-height: 25.95px;"&gt;DMA &lt;/SPAN&gt;&lt;SPAN style="line-height: 1.73;"&gt;channel for RX.&lt;/SPAN&gt;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;However the RX buffer always stays empty.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;I have configured the DMA as following:&lt;/P&gt;&lt;PRE __default_attr="plain" __jive_macro_name="code" class="_jivemacro_uid_14707162034933003 jive_macro_code jive_text_macro" data-hasrefreshed="true" data-renderedposition="230_50_798_656" jivemacro_uid="_14707162034933003" modifiedtitle="true"&gt;&lt;P&gt;NVIC_DisableIRQ(DMA_IRQn);&lt;/P&gt;&lt;P&gt;NVIC_SetPriority(DMA_IRQn, ((0x01 &amp;lt;&amp;lt; 3) | 0x01));&lt;/P&gt;&lt;P&gt;GPDMA_Init();&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GPDMA_Channel_CFG_Type dma_txconfig;&lt;/P&gt;&lt;P&gt;dma_txconfig.ChannelNum = 0;&lt;/P&gt;&lt;P&gt;dma_txconfig.TransferSize = n;&lt;/P&gt;&lt;P&gt;dma_txconfig.TransferWidth = GPDMA_WIDTH_BYTE;&lt;/P&gt;&lt;P&gt;dma_txconfig.SrcMemAddr = (uint32_t)&amp;amp;txbuf;&lt;/P&gt;&lt;P&gt;dma_txconfig.DstMemAddr = 0;&lt;/P&gt;&lt;P&gt;dma_txconfig.TransferType = GPDMA_TRANSFERTYPE_M2P_CONTROLLER_DMA;&lt;/P&gt;&lt;P&gt;dma_txconfig.SrcConn = 0;&lt;/P&gt;&lt;P&gt;dma_txconfig.DstConn = GPDMA_CONN_SSP1_Tx;&lt;/P&gt;&lt;P&gt;dma_txconfig.DMALLI = 0;&lt;/P&gt;&lt;P&gt;GPDMA_Setup(&amp;amp;dma_txconfig);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GPDMA_Channel_CFG_Type dma_rxconfig;&lt;/P&gt;&lt;P&gt;dma_rxconfig.ChannelNum = 1;&lt;/P&gt;&lt;P&gt;dma_rxconfig.TransferSize = n;&lt;/P&gt;&lt;P&gt;dma_rxconfig.TransferWidth = GPDMA_WIDTH_BYTE;&lt;/P&gt;&lt;P&gt;dma_rxconfig.SrcMemAddr = 0;&lt;/P&gt;&lt;P&gt;dma_rxconfig.DstMemAddr = (uint32_t)&amp;amp;rxbuf;&lt;/P&gt;&lt;P&gt;dma_rxconfig.TransferType = GPDMA_TRANSFERTYPE_P2M_CONTROLLER_DMA;&lt;/P&gt;&lt;P&gt;dma_rxconfig.SrcConn = GPDMA_CONN_SSP1_Rx;&lt;/P&gt;&lt;P&gt;dma_rxconfig.DstConn = 0;&lt;/P&gt;&lt;P&gt;dma_rxconfig.DMALLI = 0;&lt;/P&gt;&lt;P&gt;GPDMA_Setup(&amp;amp;dma_rxconfig);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Channel0_TC = 0;&lt;/P&gt;&lt;P&gt;Channel0_Err = 0;&lt;/P&gt;&lt;P&gt;Channel1_TC = 0;&lt;/P&gt;&lt;P&gt;Channel1_Err = 0;&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;NVIC_EnableIRQ(DMA_IRQn);&lt;/P&gt;&lt;P&gt;GPDMA_ChannelCmd(0, ENABLE);&lt;/P&gt;&lt;P&gt;SSP_DMACmd(spip-&amp;gt;ssp, SSP_DMA_TX, ENABLE);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;GPDMA_ChannelCmd(1, ENABLE);&lt;/P&gt;&lt;P&gt;SSP_DMACmd(spip-&amp;gt;ssp, SSP_DMA_RX, ENABLE);&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;while (((Channel0_TC == 0) &amp;amp;&amp;amp; (Channel0_Err == 0)) || ((Channel1_TC == 0) &amp;amp;&amp;amp; (Channel1_Err == 0)));&lt;/P&gt;&lt;/PRE&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;My SPI is configured for 8bit, so I setup the DMA Transferwidth to the same.&lt;/P&gt;&lt;P&gt;This is inside my SPI send function, so 'n' will be the amount of bytes to be transferred.&lt;/P&gt;&lt;P&gt;The Channel0_TC and Channel1_TC are set correctly to 1 in the DMA interrupt. &lt;/P&gt;&lt;P&gt;But the rxbuf configured for the RX DMA stays empty...&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Anyone a pointer what might go wrong here?&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;Cheers,&lt;/P&gt;&lt;P&gt;Gerard&lt;/P&gt;&lt;P&gt;dma_txconfig.SrcConn = 0;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Aug 2016 04:25:16 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SSP-DMA-rx-buffer-stays-empty/m-p/579934#M20156</guid>
      <dc:creator>gvandenbosch</dc:creator>
      <dc:date>2016-08-09T04:25:16Z</dc:date>
    </item>
    <item>
      <title>Re: SSP DMA, rx buffer stays empty</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SSP-DMA-rx-buffer-stays-empty/m-p/579935#M20157</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;P&gt;I just found out I made a stupid mistake.&lt;/P&gt;&lt;P&gt;It was solved by removing the &amp;amp; in front of my buffers.&lt;/P&gt;&lt;P&gt;&lt;/P&gt;&lt;P&gt;The following changes results in a working DMA on ssp:&lt;/P&gt;&lt;PRE __default_attr="c++" __jive_macro_name="code" class="jive_macro_code jive_text_macro _jivemacro_uid_1470731654443698" data-hasrefreshed="true" data-renderedposition="108_8_1192_32" jivemacro_uid="_1470731654443698"&gt;&lt;P&gt;dma_txconfig.SrcMemAddr = (uint32_t)txbuf;&lt;/P&gt;&lt;P&gt;dma_rxconfig.DstMemAddr = (uint32_t)rxbuf;&lt;/P&gt;&lt;/PRE&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Tue, 09 Aug 2016 08:35:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SSP-DMA-rx-buffer-stays-empty/m-p/579935#M20157</guid>
      <dc:creator>gvandenbosch</dc:creator>
      <dc:date>2016-08-09T08:35:09Z</dc:date>
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