topic Re: Modify Clock with PLL0 in operation in LPC Microcontrollers

Modify Clock with PLL0 in operation

lpcware — Wed, 15 Jun 2016 17:27:02 GMT

Content originally posted in LPCWare by Cleiton Bueno on Mon Nov 17 11:24:23 MST 2014
Hello!

I have an LPC1788, working perfectly using the MAIN CLOCK with external oscillator, but now I want to reduce the clock at one time and wanted to do with PLL0.
But my firmware is crashing when put to rotate the function of reducing the clock.

What I'm doing:
void ClockModify( uint32_t MValue, uint32_t PValue) {

/* 1. make sure the PLL output is not already being used */

LPC_SC->CLKSRCSEL = LPC_SC_CLKSRCSEL_CLKSRC_RC; /* set internal RC as clock source */

LPC_SC->PLL0CON = 0;                /* disable PLL0 */
pll0_feed();                                      // Apply modify in clock PLL0
LPC_SC->SCS |= (1 << 5);
while(((LPC_SC->SCS & (1 << 6)) == 0));       /* wait for main oscillator to start up */

LPC_SC->CLKSRCSEL = LPC_SC_CLKSRCSEL_CLKSRC_MAIN;

LPC_SC->PLL0CFG = (MValue << 0) | (PValue << 5);
pll0_feed();           // Apply modify in clock PLL0

LPC_SC->PLL0CON = 1;
pll0_feed();          // Apply modify in clock PLL0

/* 4. set up clock dividers */
LPC_SC->CCLKSEL = (1 << 0);

/* 5. wait for PLL to lock */
while( ((LPC_SC->PLL0STAT & (1 << 10)) == 0) );

LPC_SC->CCLKSEL |= (1 << 8);

pll0_feed();
}

Help?

Re: Modify Clock with PLL0 in operation

lpcware — Wed, 15 Jun 2016 17:27:03 GMT

Content originally posted in LPCWare by MikeSimmonds on Mon Nov 17 12:15:36 MST 2014
A little confusion between CCLKSEL and CLKSRCSEL it seems.

You need to select 'sysclk' for the CPU clock first of all

Step 0: Switch away from the PLL
LPC_SC->CCLKSEL = (0 << 8)+(1<<0) // select sysclk (and not PLL0) for cpu clk
(I'm not sure what the equates are, so I use actual numbers.)

Also for USBCLKSEL and SPFICLKSEL if you use these

As you were already running off the main oscillator, you do not need to restart and wait for the main oscillator
And you don't want to change the CLKSRCSEL away and then back to the main oscillator

Step 2:
LPC_SC->PLL0CON = 0; // disable PLL0
pll0_feed(); // Apply modify in clock PLL0

Step 3: Re-configure the PLL
LPC_SC->PLL0CFG = (MValue << 0) | (PValue << 5);
LPC_SC->PLL0CON = 1;
pll0_feed(); // Apply modify in clock PLL0 only the one feed sequence needed

while ((LPC_SC->PLL0STAT & (1 << 10)) == 0) ;

Step 4: apply stable locked PLL output to system
LPC_SC->CCLKSEL = (1 << 8)+(1<<0) // select PLL0 (and not sysclk) for cpu clk
and USB, SPIFI if reqd.

Hope this helps, MIke

Re: Modify Clock with PLL0 in operation

lpcware — Wed, 15 Jun 2016 17:27:03 GMT

Content originally posted in LPCWare by MikeSimmonds on Mon Nov 17 13:36:55 MST 2014
Also, if you change the clock speed, you may need to adjust the pCLK dividers
and you WILL have to re-initialise any peripherals you use that set a working speed based on the PCLK.
E.g. UARTS, SPI, I2C, ADC, EMC, ... probably just about everything!

Mike

Re: Modify Clock with PLL0 in operation

lpcware — Wed, 15 Jun 2016 17:27:04 GMT

Content originally posted in LPCWare by Cleiton Bueno on Tue Nov 18 13:16:47 MST 2014
OK, was my confusion, thank you Mike.
Now I will work on my peripherals, a part already OK.

Thanks!