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    <title>topic Re: LPC4350 SSP0 SPI Slave mode problem in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579200#M19978</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mysepp on Fri May 06 09:07:02 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Have you used SPI/SSP before, perhaps with a different controller, or is it the first time you are using it?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The master generates clocks, the slave receives this clock.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Only when the slave is selected by a CS (chips select=SS=SSEL), it is allowed to send data back.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It is usually a good thing (saves you some time to analyse, why it is not working as you want),&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;when you configure CS=SS=SSEL as GPIO and control it by yourself, instead of let SSP/SPI let control it automatically.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;BTW: The clock of Master occurs only, when data is sent and only the amount of 2 transitions each bit.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;After the transfers the clk remains stable at a certain level.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Pay attention to EZI bit, which enables the receiver. Otherwise you get only 0xFF.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:05:35 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:05:35Z</dc:date>
    <item>
      <title>LPC4350 SSP0 SPI Slave mode problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579199#M19977</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Abrams on Fri May 06 08:23:57 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm using LPC4350 as Slave on SPI. In debug mode, when a packet is sent to Slave nothing happens neither an interrupt nor flag setting in SSP0 Status Register. Data in Data Register is 0x0000 also.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I changed SPI mode to Master and tried to send some data. I found that SSP0 operates and sends data as Master, but in Slave it does not. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Has Master to raise SS line for SSP0 module at each 8-bit transfer? In my case Master keeps SS line low during 12-bytes transmission.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;SPI frequency is 160 kHz.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Is there a code example for configuring SSPx as SPI Slave?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579199#M19977</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:34Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4350 SSP0 SPI Slave mode problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579200#M19978</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mysepp on Fri May 06 09:07:02 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Have you used SPI/SSP before, perhaps with a different controller, or is it the first time you are using it?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The master generates clocks, the slave receives this clock.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Only when the slave is selected by a CS (chips select=SS=SSEL), it is allowed to send data back.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It is usually a good thing (saves you some time to analyse, why it is not working as you want),&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;when you configure CS=SS=SSEL as GPIO and control it by yourself, instead of let SSP/SPI let control it automatically.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;BTW: The clock of Master occurs only, when data is sent and only the amount of 2 transitions each bit.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;After the transfers the clk remains stable at a certain level.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Pay attention to EZI bit, which enables the receiver. Otherwise you get only 0xFF.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579200#M19978</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:35Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4350 SSP0 SPI Slave mode problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579201#M19979</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mysepp on Fri May 06 09:07:58 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;PS: Have a look at &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=https%3A%2F%2Fde.wikipedia.org%2Fwiki%2FSerial_Peripheral_Interface" rel="nofollow" target="_blank"&gt;https://de.wikipedia.org/wiki/Serial_Peripheral_Interface&lt;/A&gt;&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579201#M19979</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:36Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4350 SSP0 SPI Slave mode problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579202#M19980</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Abrams on Fri May 06 09:37:27 MST 2016&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm aware about SPI.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;That's amazing. Enabling EZI made SPI Slave operating.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Many thanks! &lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:05:37 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579202#M19980</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:05:37Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4350 SSP0 SPI Slave mode problem</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579203#M19981</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;SPAN&gt;bump&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Sun, 19 Jun 2016 01:10:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4350-SSP0-SPI-Slave-mode-problem/m-p/579203#M19981</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-19T01:10:08Z</dc:date>
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