<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC MicrocontrollersのトピックRe: Interface 2Mb sdram to lpc1788</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Interface-2Mb-sdram-to-lpc1788/m-p/517034#M1975</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by PhilYoung on Fri Jun 22 10:48:45 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I don't know the device, but assume from the PN it is 16 bits wide.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A0 not used &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A1..8 = collumn address&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A9 = bank select&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A10..A20 = Row address.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;A9 ( bank select ) should be output on PIN A13 ( BS0 ),&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;so the correct left shift should be 10&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;regards&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Phil.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 17:27:28 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T17:27:28Z</dc:date>
    <item>
      <title>Interface 2Mb sdram to lpc1788</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Interface-2Mb-sdram-to-lpc1788/m-p/517033#M1974</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by rgiovoni on Thu Jun 21 07:37:47 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I have an application where is necessary to interface an &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A43L0616B SDRAM to LPC1788 uController.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have 2 questions about interfacing:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1)The memory chip has only a BA (bank select) pin because &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; the chip is a 2 bank memory.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; This BA pin has to connect to P4[13]/A13 pin (on LPC1788 site)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; or to P4[14]/A14 pin?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;2)The memory work in RBC (row/bank/collun) mode.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; Than it is necessary to take into account 1 or 2 bit,(for&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; bank select) into shift number used to program mode register&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; on the memory?.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; Pratically:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; the memory has 11 row and 8 collun on 2 bank and RBC configuration&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; to program mode register it's necessary write the following line:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; Dummy = *((volatile unsigned long*)(SDRAM_BASE_ADDR | (0x22 &amp;lt;&amp;lt; (10))));&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; or to write the following line:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; Dummy = *((volatile unsigned long*)(SDRAM_BASE_ADDR | (0x22 &amp;lt;&amp;lt; (11))));&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; Thank's in advance for your help&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; Robert&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:27:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Interface-2Mb-sdram-to-lpc1788/m-p/517033#M1974</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:27:27Z</dc:date>
    </item>
    <item>
      <title>Re: Interface 2Mb sdram to lpc1788</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Interface-2Mb-sdram-to-lpc1788/m-p/517034#M1975</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by PhilYoung on Fri Jun 22 10:48:45 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I don't know the device, but assume from the PN it is 16 bits wide.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A0 not used &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A1..8 = collumn address&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A9 = bank select&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;A10..A20 = Row address.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;A9 ( bank select ) should be output on PIN A13 ( BS0 ),&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;so the correct left shift should be 10&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;regards&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Phil.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:27:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Interface-2Mb-sdram-to-lpc1788/m-p/517034#M1975</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:27:28Z</dc:date>
    </item>
    <item>
      <title>Re: Interface 2Mb sdram to lpc1788</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Interface-2Mb-sdram-to-lpc1788/m-p/517035#M1976</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Ariekanarie on Mon Sep 03 08:31:30 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hey Robert,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;At this moment I'm facing problems with the setup with a lpc1787 and the A43L0616B chip from Amic.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;As you are the only person which were talking about this chip, I was wondering if you've had it to work.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;With kind regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Arjan &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:27:28 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Interface-2Mb-sdram-to-lpc1788/m-p/517035#M1976</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:27:28Z</dc:date>
    </item>
  </channel>
</rss>

