<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC MicrocontrollersのトピックTime Stamp Trigger Interrupt</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Time-Stamp-Trigger-Interrupt/m-p/577713#M19684</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Arjan Kamphuis on Tue Sep 23 07:50:05 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm trying to resolve the status bit for the time stamp trigger interrupt. As it is not documented in the manual UM10503 v1.8.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Could it be bit 29 of the Ethernet DMA status register? Documentation says the bit is reserved, but it appears to change&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;on a time stamp interrupt event.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for your help!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:00:57 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:00:57Z</dc:date>
    <item>
      <title>Time Stamp Trigger Interrupt</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Time-Stamp-Trigger-Interrupt/m-p/577713#M19684</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Arjan Kamphuis on Tue Sep 23 07:50:05 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm trying to resolve the status bit for the time stamp trigger interrupt. As it is not documented in the manual UM10503 v1.8.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Could it be bit 29 of the Ethernet DMA status register? Documentation says the bit is reserved, but it appears to change&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;on a time stamp interrupt event.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for your help!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:00:57 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Time-Stamp-Trigger-Interrupt/m-p/577713#M19684</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:00:57Z</dc:date>
    </item>
  </channel>
</rss>

