LPC Microcontrollers中的主题 Re: Yet another +5V tolerant IOs question

Yet another +5V tolerant IOs question

lpcware — Wed, 15 Jun 2016 19:02:36 GMT

Content originally posted in LPCWare by sasa.bremec on Mon Dec 02 04:41:05 MST 2013
Hi to all.

Reading footnotes in the LPC43xx data sheet I found the lines below:

+5 V tolerant pad providing digital I/O functions (with TTL levels and hysteresis) and analog input or output (5 V tolerant if VDDIO present; if VDDIO not present, do not exceed 3.6 V).

So if I want to have 5V outpust do I connect 3V3 or 5V on the VDDIO.
In the datasheet pg. 89 Limiting values there is a line Vi mar = 5.5V when VDD(IO)[u]>[/u]2.2V 5V tolerant digital I/O pins.

Unfortunately the same statement is in the UM.

Thanks, Sash

Re: Yet another +5V tolerant IOs question

lpcware — Wed, 15 Jun 2016 19:02:37 GMT

Content originally posted in LPCWare by Martin84 on Mon Dec 02 04:55:28 MST 2013
In Datasheet pg.91 you find a value for VDDIO = 2.2 ... 3.6V.

You have to supply the VDDIO pins with 3.3V. Your Inputs are only 5V tolerant if the VDDIO-supply is present. When there aren't any 3.3V at VDDIO then your Inputs get damaged.

If you want to drive a 5V signal, you need a MOSFET that will be turned on or off by µC.

Re: Yet another +5V tolerant IOs question

lpcware — Wed, 15 Jun 2016 19:02:37 GMT

Content originally posted in LPCWare by sasa.bremec on Mon Dec 02 05:44:42 MST 2013
Martin84 thanks.

VDDIO were connected to the 3V3. Fortunately I need IOs as inputs.

Thanks again.