lpcopen v2.10 lpc17xx EMC driver

lpcware — Wed, 15 Jun 2016 20:17:04 GMT

Content originally posted in LPCWare by wella-tabor on Fri Feb 06 01:17:18 MST 2015
Hello,

could you somehow correct the driver for lpc17xx EMC? The function

/**
 * @briefInitialize EMC
 * @paramEnable: 1 = Enable, 0 = Disable
 * @paramClockRatio: clock out ratio, 0 = 1:1, 1 = 1:2
 * @paramEndianMode: Endian Mode, 0 = Little, 1 = Big
 * @returnNone
 */
void Chip_EMC_Init(uint32_t Enable, uint32_t ClockRatio, uint32_t EndianMode);

/* Initialize EMC */
void Chip_EMC_Init(uint32_t Enable, uint32_t ClockRatio, uint32_t EndianMode)
{
LPC_EMC->CONFIG    = (EndianMode ? 1 : 0) | ((ClockRatio ? 1 : 0) << 8);

/* Enable EMC 001 Normal Memory Map, No low power mode */
LPC_EMC->CONTROL     = (Enable ? 1 : 0);
}

is not able to set 1:2 clock out ratio. Even, it even makes the EMC not working properly, see the UM 10470

8 - Reserved. This bit must contain 0 for proper operation of the EMC.

Best
Martin

Re: lpcopen v2.10 lpc17xx EMC driver

lpcware — Wed, 15 Jun 2016 20:17:05 GMT

Content originally posted in LPCWare by MikeSimmonds on Fri Feb 06 10:18:21 MST 2015
Definitely BOGUS for 1778/1788!

Possibly yet more blind cut and paste from a different series MCU?
[Does LPCOpen code get peer review or actual testing before release?]

However, EMC clock divider is bit 0 of a different register -- EMCCLKSEL.
See latest user manual 3.3.9

I don't use LPCOpen (or "C" for chip drivers) myself but will be in a different register block (LPC???->EMCCLKSEL).

To help you track it down, the clkSel register is at 0x400F C100.

Mike.

topic Re: lpcopen v2.10 lpc17xx EMC driver in LPC Microcontrollers

lpcopen v2.10 lpc17xx EMC driver

Re: lpcopen v2.10 lpc17xx EMC driver