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    <title>LPC MicrocontrollersのトピックRe: Cannot halt 43xx cores</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575851#M19322</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by nerd herd on Wed Dec 17 16:27:00 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Chris,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;As TheFallGuy's link mentions, there are several reasons why this may happen. The long story short is that your code likely puts the MCU into a state where the debugger is no longer able to communicate with the MCU. Booting the MCU into ISP mode is a great "catch all" solution for issues involving user code as it puts the MCU into a communicable state and avoids user code all together. After entering ISP mode, it is a good idea to erase the flash with a program such as Flash Magic and see if the issue persists.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:01:34 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:01:34Z</dc:date>
    <item>
      <title>Cannot halt 43xx cores</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575849#M19320</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by chris_bayley_trimble on Wed Dec 17 14:24:56 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am relatively new to LPC stuff, but am working on a new product incorporating dual HS USB so have been working with USB sample code on several Xplorer-43xx boards and an Xplorer-18xx board. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Yesterday without warning all of my 43xx boards began giving problems with the debugger and started returning a 'Cannot halt processor' error when initiating debug' as below.&lt;/SPAN&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;LPCXpresso RedlinkMulti Driver v7.5 (Oct 24 2014 22:19:37 - crt_emu_cm_redlink build 172)
Found chip XML file in /Users/cbayley/src/NXP/LPCOpen/Xplorer4330/LPC4357_test/Debug/LPC4357.xml
(&amp;nbsp; 5) Remote configuration complete
Cannot halt processor
Cannot halt processor
Emu(0): Conn&amp;amp;Reset. DpID: 4BA00477. CpuID: 410FC240. Info: (null)
Debug protocol: JTAG. RTCK: Disabled. Vector catch: Disabled.
Cannot halt processor
Failed on chip setup: Ep(04). Cannot halt processor.
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;SPAN&gt;I can't identify what may have caused this change in behaviour. At first I suspected the LPCLink-2 but it is still working fine with the Xplorer-18xx board. The 43xx boards I can connect to and halt using OpenOCD and a luminary probe but I haven't yet succeeded in incorporating that into LPCXpresso so I'm still a bit stuck. I've tried with many projects which have all previously been fine, I have tried switching to SWD, but I'm not getting very far.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;What things can cause a failure of LPCLink2/RedLink to halt a 43xx processor ? A boot setting ?, some OTP bit ?, ??&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I've spent a few hours wrestling with it and would be glad of some suggestions at this point.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cheers,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chris&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:01:33 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575849#M19320</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:01:33Z</dc:date>
    </item>
    <item>
      <title>Re: Cannot halt 43xx cores</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575850#M19321</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by TheFallGuy on Wed Dec 17 15:59:03 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Take a look at this&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fcontent%2Ffaq%2Flpcxpresso%2Fregaining-debug-access" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/content/faq/lpcxpresso/regaining-debug-access&lt;/A&gt;&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:01:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575850#M19321</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:01:34Z</dc:date>
    </item>
    <item>
      <title>Re: Cannot halt 43xx cores</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575851#M19322</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by nerd herd on Wed Dec 17 16:27:00 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Chris,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;As TheFallGuy's link mentions, there are several reasons why this may happen. The long story short is that your code likely puts the MCU into a state where the debugger is no longer able to communicate with the MCU. Booting the MCU into ISP mode is a great "catch all" solution for issues involving user code as it puts the MCU into a communicable state and avoids user code all together. After entering ISP mode, it is a good idea to erase the flash with a program such as Flash Magic and see if the issue persists.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:01:34 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575851#M19322</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:01:34Z</dc:date>
    </item>
    <item>
      <title>Re: Cannot halt 43xx cores</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575852#M19323</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by chris.bayley on Wed Dec 17 20:26:46 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for the reply,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I'm not sure if I'm making progress but I have to look for small wins today! I booted the board in ISP and managed to clear the SPIFI flash using OpenOCD and an Olimex JTAG which I was not able to achieve before the ISP reboot. I was optimistic however it will still not communicate with the LPCLink2. 'Cannot halt processor' still.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Are there any OTP or CRP bits I need to be warry of that could be getting in the way ?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;BR,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chris &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:01:35 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575852#M19323</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:01:35Z</dc:date>
    </item>
    <item>
      <title>Re: Cannot halt 43xx cores</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575853#M19324</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by chris_bayley_trimble on Thu Dec 18 17:33:38 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;SOLVED:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Here's the code that caused the lockout:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;LPC_CCU1-&amp;gt;CLKCCU[0x100].CFG &amp;amp;= ~1&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;As soon as that executes I cannot communicate any further and cannot regain control until I have booted in ISP and wiped the flash.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Now I will go and learn why.....&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;C&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:01:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575853#M19324</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:01:36Z</dc:date>
    </item>
    <item>
      <title>Re: Cannot halt 43xx cores</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575854#M19325</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by metraTec on Tue Dec 22 08:12:24 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I've just have the same problem and found the same thing to cause the problem. Even an access via peripheral debug (CCU1) or direct address (*(u32*)(0x40051000+0xB00)) causes a total freeze of debugging and execution. &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Has anyone already found any real solution? Just don't changing the value might be enough but is not the right aproach I think.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:01:36 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Cannot-halt-43xx-cores/m-p/575854#M19325</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:01:36Z</dc:date>
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