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    <title>LPC MicrocontrollersのトピックRe: LPC43xx External Static Memory - Read/Write buffering</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC43xx-External-Static-Memory-Read-Write-buffering/m-p/574367#M19017</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lochkartenman on Thu Oct 02 02:29:24 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Many thanks. That puts the NPC43xx into a different light - I'm afraid I've been mislead by the stunningly short errata sheet. Apparently the STM32F4xx are comparable in terms of cavecats. What a pitty.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:58:48 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:58:48Z</dc:date>
    <item>
      <title>LPC43xx External Static Memory - Read/Write buffering</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC43xx-External-Static-Memory-Read-Write-buffering/m-p/574365#M19015</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lochkartenman on Wed Oct 01 10:52:05 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;We would like to tightly-couple a FPGA with a µC by means of the external static memory memory controller, thereby effectively mapping the FPGA registers into main memory of the µC with maximum bandwidth. At the moment we plan with 8-bit address &amp;amp; data and async. static NOR like interfacing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;For this setup it is necessary that each and every read/write is actually transmitted to the FPGA (memory) device and no buffering takes place. Since I am still new to the the LPC43xx family I wonder whether disabling buffers in the Static Memory Configuration registers is sufficient. &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:58:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC43xx-External-Static-Memory-Read-Write-buffering/m-p/574365#M19015</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:58:46Z</dc:date>
    </item>
    <item>
      <title>Re: LPC43xx External Static Memory - Read/Write buffering</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC43xx-External-Static-Memory-Read-Write-buffering/m-p/574366#M19016</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by hlsa on Thu Oct 02 01:20:39 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Be careful!&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have fallen into this trap by my own, trying to attach the AD7609 to the LPC4357 (in parallel I have a SDRAM connected to the EMC).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It resulted in a desaster:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;[list]&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; [*]My ADC has no adresses. Accessing the same address twice results in not reading the second time. I increased the address of my access pointer in order to make the EMC believe, that the address has changed. This worked, but: You cannot use this, if you need addresses.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp; [*]For some reason (which I don't really understand), the EMC performs 8 consequent read accesses to the ADC, then it makes a long break, before the next 8 consequent reads are performed. Since I need my ADC data in realtime, this is not applicable for me.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;[/list]&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;At the moment I am doing a redesign, where I will attach the ADC via SPI.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;You should read this thread:&lt;/SPAN&gt;&lt;BR /&gt;&lt;A href="http://http://www.lpcware.com/content/forum/emc-generates-double-read-cycles-static-chip-selects"&gt;http://www.lpcware.com/content/forum/emc-generates-double-read-cycles-static-chip-selects&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Best regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Holger&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:58:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC43xx-External-Static-Memory-Read-Write-buffering/m-p/574366#M19016</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:58:47Z</dc:date>
    </item>
    <item>
      <title>Re: LPC43xx External Static Memory - Read/Write buffering</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC43xx-External-Static-Memory-Read-Write-buffering/m-p/574367#M19017</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lochkartenman on Thu Oct 02 02:29:24 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Many thanks. That puts the NPC43xx into a different light - I'm afraid I've been mislead by the stunningly short errata sheet. Apparently the STM32F4xx are comparable in terms of cavecats. What a pitty.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:58:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC43xx-External-Static-Memory-Read-Write-buffering/m-p/574367#M19017</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:58:48Z</dc:date>
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