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    <title>LPC Microcontrollersのトピック[LPC1788] [LPCOpen] Bug in EMC initialisation with SDRAM in RBC configuration</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1788-LPCOpen-Bug-in-EMC-initialisation-with-SDRAM-in-RBC/m-p/573446#M18812</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pgr on Tue Jun 24 01:45:49 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am using LPCOpen last revision with on a LPC1788 with external SDRAM configured as RBC (Row Bank Column).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have found that there is a bug when configuring SDRAM mode register, according to the LPC1788 user manual: &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;Determine the shift value OFFSET to shift the mode register content by. This shift&lt;BR /&gt;value depends on the SDRAM device organization and it is calculated as:&lt;BR /&gt;OFFSET = number of columns + total bus width + bank select bits (RBC mode)&lt;BR /&gt;OFFSET = number of columns + total bus width (BRC mode)&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The bank select bits are never added to the Col_len variable in initDynMem() function so the mode register is wrongly initialized.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;PGR&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 20:15:03 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T20:15:03Z</dc:date>
    <item>
      <title>[LPC1788] [LPCOpen] Bug in EMC initialisation with SDRAM in RBC configuration</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1788-LPCOpen-Bug-in-EMC-initialisation-with-SDRAM-in-RBC/m-p/573446#M18812</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by pgr on Tue Jun 24 01:45:49 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I am using LPCOpen last revision with on a LPC1788 with external SDRAM configured as RBC (Row Bank Column).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I have found that there is a bug when configuring SDRAM mode register, according to the LPC1788 user manual: &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;HR /&gt;&lt;SPAN style="color: #0000ff;"&gt;&lt;STRONG&gt;Quote: &lt;/STRONG&gt;&lt;BR /&gt;Determine the shift value OFFSET to shift the mode register content by. This shift&lt;BR /&gt;value depends on the SDRAM device organization and it is calculated as:&lt;BR /&gt;OFFSET = number of columns + total bus width + bank select bits (RBC mode)&lt;BR /&gt;OFFSET = number of columns + total bus width (BRC mode)&lt;/SPAN&gt;&lt;HR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The bank select bits are never added to the Col_len variable in initDynMem() function so the mode register is wrongly initialized.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;PGR&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:15:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC1788-LPCOpen-Bug-in-EMC-initialisation-with-SDRAM-in-RBC/m-p/573446#M18812</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:15:03Z</dc:date>
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