topic Re: Descriptor Table for HSADC in LPC Microcontrollers

Descriptor Table for HSADC

lpcware — Wed, 15 Jun 2016 18:57:29 GMT

Content originally posted in LPCWare by MoenK on Tue Mar 10 04:16:25 MST 2015
If I want to use the HSADC to sample 1 channel for 10ms at 750kHz, does it mean that I have to compute a descriptor table with 7500samples? With the last entry set to contain HALT and the fADC set at 750kHz.

Is there another way to stop the sampling other than from within the descriptor table?

The sampling starts when I use a external GPIO interrupt to start the SWtrigger.

Re: Descriptor Table for HSADC

lpcware — Wed, 15 Jun 2016 18:57:30 GMT

Content originally posted in LPCWare by heffalump on Sun Mar 15 21:49:04 MST 2015
You can use the GPDMA to move a set number of samples from the HSADC into memory. The GPDMA can be set to throw an interrupt once finished. This way you only need a single HSADC descriptor looping back on itself.

To get started runing the HSADC with the GPDMA, you can use the modified LPCopen library kindly provided by mch0: http://www.lpcware.com/content/forum/gpdma-library-hsadc

Hope this helps!

Re: Descriptor Table for HSADC

lpcware — Wed, 15 Jun 2016 18:57:30 GMT

Content originally posted in LPCWare by MoenK on Mon Mar 16 04:49:08 MST 2015
Thanks so much for your help!

I am now using the GPDMA library that you recommended. I can check that my HSADC is sampling correctly if I use Chip_HSADC_GetFIFO(LPC_ADCHS), however when I use DMA the sampled data do not seem to copy over. Sometimes I only get 1 sample or 4 depending on the burstsize set in the library.

This is my initialization of the DMA. It is taken from the periph_dma_timertrig with modifications. Are there any obvious steps/things I am doing wrong?

#define SOURCEARRAYSIZE (18)  //need 16, 2 extra

/* Source and destination DMA areas */
static uint32_t source[SOURCEARRAYSIZE], dest[SOURCEARRAYSIZE];

static void setupDMA(void)
{
/* Initialize GPDMA controller */
Chip_GPDMA_Init(LPC_GPDMA);

/* Get DMA channel */
dmaCh = Chip_GPDMA_GetFreeChannel(LPC_GPDMA, GPDMA_CONN_HSADC_READ);

/* Setup DMA transfer */
Chip_GPDMA_Transfer(LPC_GPDMA, dmaCh,
GPDMA_CONN_HSADC_READ, (uint32_t) &dest[0],
GPDMA_TRANSFERTYPE_P2M_CONTROLLER_DMA,
8);

/* Enable GPDMA interrupt */
NVIC_EnableIRQ(DMA_IRQn);
}

I may be misunderstanding the transfersize, burstsize and transfer width.
Eg: If I set my ADC FIFO_trip level at 8 with no packing, I would expect the DMA to start when there are 8 samples. (8 words in FIFO)
And I want to clear the FIFO in 1 DMA read, I would set my transfer width to be WORD, burstsize to be 8 and transfersize to be 8?

Anyway with regards to the first issue, it is preferable to update a adc descriptor table that is not active right? So I would still need to use 2 tables?

Sorry for the long post.