LPC MicrocontrollersのトピックSDRAM reference design and code https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-reference-design-and-code/m-p/571213#M18334 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by wlamers on Thu May 16 01:47:57 MST 2013</STRONG><BR /><P>I have a design that requires both a SDRAM and an SD card. I know from this forum that there are some conflicting pin requirements for their clocks. I use a BGA256 IC, which should solve this issue.</P><BR /><P>I simply could copy the schematic designs for the SDRAM of the Keil, Hitex or Embest development boards, but this does of course not guarantee a flawlessy working SDRAM. Can someone help me with a working reference design (preferably schematic+layout+code)? I do not have special requirements for RAM size, port width and clock frequency/timings.</P><BR /><P>Thanks!</P></BODY></HTML> Wed, 15 Jun 2016 18:55:57 GMT lpcware 2016-06-15T18:55:57Z SDRAM reference design and code https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-reference-design-and-code/m-p/571213#M18334 <HTML><HEAD></HEAD><BODY><STRONG>Content originally posted in LPCWare by wlamers on Thu May 16 01:47:57 MST 2013</STRONG><BR /><P>I have a design that requires both a SDRAM and an SD card. I know from this forum that there are some conflicting pin requirements for their clocks. I use a BGA256 IC, which should solve this issue.</P><BR /><P>I simply could copy the schematic designs for the SDRAM of the Keil, Hitex or Embest development boards, but this does of course not guarantee a flawlessy working SDRAM. Can someone help me with a working reference design (preferably schematic+layout+code)? I do not have special requirements for RAM size, port width and clock frequency/timings.</P><BR /><P>Thanks!</P></BODY></HTML> Wed, 15 Jun 2016 18:55:57 GMT https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-reference-design-and-code/m-p/571213#M18334 lpcware 2016-06-15T18:55:57Z