<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>LPC MicrocontrollersのトピックRe: LPC4337 and interupts on M0app</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567480#M17540</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Witte on Thu Sep 11 07:43:13 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hey Karpis,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I had problem with PIN_INT4_IRQn either.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;How lpcxpresso-support's says, there are many examples with PIN_INT interrupts on "Peripheral Driver Library" project.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;With these examples I found my mistakes.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Look my code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#define TEST_INPUT_PIN&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 7/* GPIO pin number mapped to PININT */
#define TEST_INPUT_PORT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0/* GPIO port number mapped to PININT */
#define TEST_INPUT_PIN_PORT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2
#define TEST_INPUT_PIN_BIT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 7
#define TEST_INPUT_MODE_FUNC&amp;nbsp;&amp;nbsp;&amp;nbsp; SCU_MODE_FUNC0
#define PININT_INDEX&amp;nbsp;&amp;nbsp; 4/* PININT index used for GPIO mapping */
#define PININT_NVIC_NAME&amp;nbsp;&amp;nbsp;&amp;nbsp; PIN_INT4_IRQn/* GPIO interrupt NVIC interrupt name */


void GPIO4_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(PININT_INDEX));
}

int main()
{
Chip_SCU_PinMuxSet(TEST_INPUT_PIN_PORT, TEST_INPUT_PIN_BIT,
(SCU_MODE_INBUFF_EN | SCU_MODE_INACT | TEST_INPUT_MODE_FUNC) );

/* Configure GPIO pin as input */
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, TEST_INPUT_PORT, TEST_INPUT_PIN);

/* Configure interrupt channel for the GPIO pin in SysCon block */
Chip_SCU_GPIOIntPinSel(PININT_INDEX, TEST_INPUT_PORT, TEST_INPUT_PIN);

/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_GPIO_PIN_INT, PININTCH(PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_GPIO_PIN_INT, PININTCH(PININT_INDEX));

/* Enable interrupt in the NVIC */
NVIC_ClearPendingIRQ(PININT_NVIC_NAME);
NVIC_EnableIRQ(PININT_NVIC_NAME);

while(1)
{
__no_operation();
}
}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;It works with me...&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;This code is the "main_CoreM0.c".&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:51:06 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:51:06Z</dc:date>
    <item>
      <title>LPC4337 and interupts on M0app</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567475#M17535</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by karpis on Mon Sep 01 05:24:21 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I have NGX&amp;nbsp; LPC4337-Xplorer board and try unsuccessfully to make M0 interupts work on it. I want GPIO interrupt and on M4 core it works on PIN_INT0_IRQn. From manual it is impossible to have PIN_INT0_IRQn so I switched to PIN_INT4_IRQn. All GPIO Pin Interrupt registers look the same (except M0 uses (1&amp;lt;&amp;lt;4) while M4 (1&amp;lt;&amp;lt;0) mask). So I'm guessing that something is wrong with my vector table. So simple question has anyone successfully launched interrupts from M0 core?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:51:02 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567475#M17535</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:51:02Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4337 and interupts on M0app</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567476#M17536</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by whitecoe on Mon Sep 01 06:56:55 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I've certainly had interrupts working on the LPC43 M0. Have you double checked that the names of your handlers match those in your M0 startup code?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fcontent%2Ffaq%2Flpcxpresso%2Fstartup-code-interrupt-handlers" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/content/faq/lpcxpresso/startup-code-interrupt-handlers&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;HTH!&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:51:03 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567476#M17536</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:51:03Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4337 and interupts on M0app</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567477#M17537</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by karpis on Tue Sep 02 01:49:07 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Yes I looked up for correct handlers. Is there any possibility you could provide example of working interrupts on M0? Today I have tried with Timer0 interrupt on both cores and only M4 seems to work. I'm running out of ideas&amp;nbsp; :~ &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:51:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567477#M17537</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:51:04Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4337 and interupts on M0app</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567478#M17538</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lpcxpresso-support on Wed Sep 03 00:25:47 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Have you looked at the LPCOpen examples for LPC43xx?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fcontent%2Fnxpfile%2Flpcopen-software-development-platform-lpc43xx-packages" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/content/nxpfile/lpcopen-software-development-platform-lpc43xx-packages&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;For the multicore examples, you should also look at:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fcontent%2Ffaq%2Fhow-run-multicore-examples-provided-lpcopen-lpc43xx-packages" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/content/faq/how-run-multicore-examples-provided-lpcopen-lpc43xx-packages&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If you are using LPCXpresso, then there are also some simple multicore examples using the old "Peripheral Driver Library" (which LPCOpen has replaced) in the LPC43xx examples directory.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LPCXpresso Support&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:51:04 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567478#M17538</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:51:04Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4337 and interupts on M0app</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567479#M17539</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by bavarian on Tue Sep 09 01:58:34 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;The code attached to this app note&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; &lt;/SPAN&gt;&lt;A href="http://http://www.lpcware.com/content/nxpfile/an11177-inter-processor-communication-lpc43xx"&gt;http://www.lpcware.com/content/nxpfile/an11177-inter-processor-communication-lpc43xx&lt;/A&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;realizes a communication between the M4 and the M0 with the core-2-core interrupt mechanism.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;It is a an older code example which will maybe not run as is with new compiler versions and/or on the board you have, but it might provide you with the right ideas how to setup the chip in such a way that the M0a interrupt works.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;There are examples in the LPCOpen software package which should work as well, but maybe it's easier to find the missing setting in this app note than in the big LPCOpen package.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;NXP Support Team.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:51:05 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567479#M17539</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:51:05Z</dc:date>
    </item>
    <item>
      <title>Re: LPC4337 and interupts on M0app</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567480#M17540</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Witte on Thu Sep 11 07:43:13 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hey Karpis,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I had problem with PIN_INT4_IRQn either.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;How lpcxpresso-support's says, there are many examples with PIN_INT interrupts on "Peripheral Driver Library" project.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;With these examples I found my mistakes.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Look my code:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;TABLE border="1"&gt;&lt;TBODY&gt;&lt;TR&gt;&lt;TD bgcolor="#cacaca"&gt; &lt;PRE&gt;
#define TEST_INPUT_PIN&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 7/* GPIO pin number mapped to PININT */
#define TEST_INPUT_PORT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 0/* GPIO port number mapped to PININT */
#define TEST_INPUT_PIN_PORT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 2
#define TEST_INPUT_PIN_BIT&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp;&amp;nbsp; 7
#define TEST_INPUT_MODE_FUNC&amp;nbsp;&amp;nbsp;&amp;nbsp; SCU_MODE_FUNC0
#define PININT_INDEX&amp;nbsp;&amp;nbsp; 4/* PININT index used for GPIO mapping */
#define PININT_NVIC_NAME&amp;nbsp;&amp;nbsp;&amp;nbsp; PIN_INT4_IRQn/* GPIO interrupt NVIC interrupt name */


void GPIO4_IRQHandler(void)
{
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(PININT_INDEX));
}

int main()
{
Chip_SCU_PinMuxSet(TEST_INPUT_PIN_PORT, TEST_INPUT_PIN_BIT,
(SCU_MODE_INBUFF_EN | SCU_MODE_INACT | TEST_INPUT_MODE_FUNC) );

/* Configure GPIO pin as input */
Chip_GPIO_SetPinDIRInput(LPC_GPIO_PORT, TEST_INPUT_PORT, TEST_INPUT_PIN);

/* Configure interrupt channel for the GPIO pin in SysCon block */
Chip_SCU_GPIOIntPinSel(PININT_INDEX, TEST_INPUT_PORT, TEST_INPUT_PIN);

/* Configure channel interrupt as edge sensitive and falling edge interrupt */
Chip_PININT_ClearIntStatus(LPC_GPIO_PIN_INT, PININTCH(PININT_INDEX));
Chip_PININT_SetPinModeEdge(LPC_GPIO_PIN_INT, PININTCH(PININT_INDEX));
Chip_PININT_EnableIntLow(LPC_GPIO_PIN_INT, PININTCH(PININT_INDEX));

/* Enable interrupt in the NVIC */
NVIC_ClearPendingIRQ(PININT_NVIC_NAME);
NVIC_EnableIRQ(PININT_NVIC_NAME);

while(1)
{
__no_operation();
}
}
&lt;/PRE&gt; &lt;/TD&gt;&lt;/TR&gt;&lt;/TBODY&gt;&lt;/TABLE&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;It works with me...&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;This code is the "main_CoreM0.c".&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:51:06 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/LPC4337-and-interupts-on-M0app/m-p/567480#M17540</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:51:06Z</dc:date>
    </item>
  </channel>
</rss>

