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    <title>topic DMA with usart in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-with-usart/m-p/565583#M17121</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by ramniraj10 on Tue Dec 09 06:50:53 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Using DMA for uart Tx and RX data.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Sample:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;1. Data len is 9 bit.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2. Using DMA and UART1 IRQ&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;3. DMA is used to recv the expected buffer size.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;4. In 9-bit mode, UARt interrupt is generated. Check the first byte if address. Disable RXRDY interrupt.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;5. DMA is always running to receive all data.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;6. Recv all data and enable RXRDY interrupt for further address detection.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Sample:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;UART1_Handler()&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if ( Status &amp;amp; UART_STAT_RXRDY )&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if ( ((regVal=Chip_UART_ReadByte(LPC_USART1)) &amp;amp; 0x100) &amp;amp;&amp;amp; (Chip_UART_GetCTRLRegister(LPC_USART1) &amp;amp; UART_CTRL_ADDRDET) )&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;AddrDetected = regVal &amp;amp; 0x1FF;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_UART_IntDisable(LPC_USART1, UART_INTEN_RXRDY);//Disable UART RXRDY Interrupt&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void DMA_IRQHandler(void)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Check DMA interrupts of UART 0 RX channel */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if ((errors | pending) &amp;amp; (1 &amp;lt;&amp;lt; DMAREQ_USART0_RX)) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Clear DMA interrupt for the channel */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_DMA_ClearActiveIntAChannel(LPC_DMA, DMAREQ_USART0_RX);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Handle errors if needed */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if (errors &amp;amp; (1 &amp;lt;&amp;lt; DMAREQ_USART0_RX)) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* DMA error, channel needs to be reset */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;dmaClearChannel(DMAREQ_USART0_RX);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;dmaRXSetup0();&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;dmaRXQueue0();&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;else {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;uartRxAvail0 = true;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Recv_function(void)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;int bytes;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;uint8_t buff[UARTRXBUFFSIZE1];&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;bytes = checkRxData1(buff);//Recv expected buffer size&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;//Ques: Does this buffer contain first byte as address received in UART1_Handler?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;//Re-enable UART RXRDY Interrupt for addr detection&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_UART_IntEnable(LPC_USART1, UART_INTEN_RXRDY);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 20:04:30 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T20:04:30Z</dc:date>
    <item>
      <title>DMA with usart</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-with-usart/m-p/565583#M17121</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by ramniraj10 on Tue Dec 09 06:50:53 MST 2014&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Using DMA for uart Tx and RX data.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Sample:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;1. Data len is 9 bit.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2. Using DMA and UART1 IRQ&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;3. DMA is used to recv the expected buffer size.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;4. In 9-bit mode, UARt interrupt is generated. Check the first byte if address. Disable RXRDY interrupt.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;5. DMA is always running to receive all data.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;6. Recv all data and enable RXRDY interrupt for further address detection.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Sample:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;UART1_Handler()&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;nbsp;&amp;nbsp;&amp;nbsp; if ( Status &amp;amp; UART_STAT_RXRDY )&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if ( ((regVal=Chip_UART_ReadByte(LPC_USART1)) &amp;amp; 0x100) &amp;amp;&amp;amp; (Chip_UART_GetCTRLRegister(LPC_USART1) &amp;amp; UART_CTRL_ADDRDET) )&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;AddrDetected = regVal &amp;amp; 0x1FF;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_UART_IntDisable(LPC_USART1, UART_INTEN_RXRDY);//Disable UART RXRDY Interrupt&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;void DMA_IRQHandler(void)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Check DMA interrupts of UART 0 RX channel */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if ((errors | pending) &amp;amp; (1 &amp;lt;&amp;lt; DMAREQ_USART0_RX)) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Clear DMA interrupt for the channel */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_DMA_ClearActiveIntAChannel(LPC_DMA, DMAREQ_USART0_RX);&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;/* Handle errors if needed */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if (errors &amp;amp; (1 &amp;lt;&amp;lt; DMAREQ_USART0_RX)) {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;/* DMA error, channel needs to be reset */&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;dmaClearChannel(DMAREQ_USART0_RX);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;dmaRXSetup0();&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;dmaRXQueue0();&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;else {&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;uartRxAvail0 = true;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Recv_function(void)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;{&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;int bytes;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;uint8_t buff[UARTRXBUFFSIZE1];&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;bytes = checkRxData1(buff);//Recv expected buffer size&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;//Ques: Does this buffer contain first byte as address received in UART1_Handler?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;//Re-enable UART RXRDY Interrupt for addr detection&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Chip_UART_IntEnable(LPC_USART1, UART_INTEN_RXRDY);&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;}&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:04:30 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/DMA-with-usart/m-p/565583#M17121</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:04:30Z</dc:date>
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