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    <title>LPC MicrocontrollersのトピックGPDMA : Using 1 DMA req for 2 Channels---DMA req SYNC register?</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/GPDMA-Using-1-DMA-req-for-2-Channels-DMA-req-SYNC-register/m-p/563393#M16662</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by blueo on Thu Feb 05 22:38:40 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I need to know if it is possible to specify 1 DMA Request for more than 1 channels?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I want to set DMAMUXPER10=0x2(SCT DMA Request 0) and then assign 0x7(SCT DMA request 0) to 2 of Channel Config registers.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I know it is not possible for STM32F40x as ST datasheet says, but NXP datasheets are not as well-written.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;2)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;There is a register to enable/disable Sync logic for each of the 16 DMA requests.I don't understand it clearly as I couldn't find more info on that besides a brief description of the register in UM.What does it do exactly?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;regards&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:48:29 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:48:29Z</dc:date>
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      <title>GPDMA : Using 1 DMA req for 2 Channels---DMA req SYNC register?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/GPDMA-Using-1-DMA-req-for-2-Channels-DMA-req-SYNC-register/m-p/563393#M16662</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by blueo on Thu Feb 05 22:38:40 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi all,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I need to know if it is possible to specify 1 DMA Request for more than 1 channels?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I want to set DMAMUXPER10=0x2(SCT DMA Request 0) and then assign 0x7(SCT DMA request 0) to 2 of Channel Config registers.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I know it is not possible for STM32F40x as ST datasheet says, but NXP datasheets are not as well-written.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;2)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;There is a register to enable/disable Sync logic for each of the 16 DMA requests.I don't understand it clearly as I couldn't find more info on that besides a brief description of the register in UM.What does it do exactly?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;regards&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:48:29 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/GPDMA-Using-1-DMA-req-for-2-Channels-DMA-req-SYNC-register/m-p/563393#M16662</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:48:29Z</dc:date>
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