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    <title>topic Re: SDRAM refresh cycle / LPC_EMC-&amp;gt;DYNAMICREFRESH / Finding correct value in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-refresh-cycle-LPC-EMC-gt-DYNAMICREFRESH-Finding-correct/m-p/561633#M16331</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mc on Tue Sep 29 06:23:08 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Holger,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Your formula to calculate refresh time is correct. The programmed refresh time should be less than 64ms.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:47:42 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:47:42Z</dc:date>
    <item>
      <title>SDRAM refresh cycle / LPC_EMC-&gt;DYNAMICREFRESH / Finding correct value</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-refresh-cycle-LPC-EMC-gt-DYNAMICREFRESH-Finding-correct/m-p/561632#M16330</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by hlsa on Sun Sep 27 23:05:42 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am using the LPC4357 @ 204 MHz with 102 MHz EMC clock and an ISSI IS42S32800G-7BLI SDRAM.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;The SDRAM requires 4096 refresh cycles every 64ms.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;So far I have set the dynamic refresh register LPC_EMC-&amp;gt;DYNAMICREFRESH to 100. If I understood the user manual correctly, this equals a refresh cycle time of 100 * 16 * 4096 * 1/102MHz = 64.25ms.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If I understand it further correctly, this is too long and I would need a value for LPC_EMC-&amp;gt;DYNAMICREFRESH, which is a little bit lower, e.g. 98 * 16 * 4096 * 1/102MHz = 63 ms.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Am I correct? Can anyone please confirm this?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Many thanks,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Holger&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;P.S. My system works pretty fine. However, since reliability of our products is extremely important, I do not want to run anything out of spec.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:47:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-refresh-cycle-LPC-EMC-gt-DYNAMICREFRESH-Finding-correct/m-p/561632#M16330</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:47:41Z</dc:date>
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    <item>
      <title>Re: SDRAM refresh cycle / LPC_EMC-&gt;DYNAMICREFRESH / Finding correct value</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-refresh-cycle-LPC-EMC-gt-DYNAMICREFRESH-Finding-correct/m-p/561633#M16331</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by mc on Tue Sep 29 06:23:08 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Holger,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Your formula to calculate refresh time is correct. The programmed refresh time should be less than 64ms.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:47:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/SDRAM-refresh-cycle-LPC-EMC-gt-DYNAMICREFRESH-Finding-correct/m-p/561633#M16331</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:47:42Z</dc:date>
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