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    <title>topic Re: Release Build Rarely Boots in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Release-Build-Rarely-Boots/m-p/561552#M16319</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by suckfish on Thu Jun 20 23:39:21 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;The first two things I'd check:&lt;/P&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;ul&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;li&amp;gt;Make sure you wait as appropriate for any config to take effect. There aren't many things that need that. An non-debug build will be faster and more likely to trip over any problems here.&amp;lt;/li&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;li&amp;gt;Make sure you use volatile accesses (or memory barriers) for all config registers. A debug build has less optimisation meaning that you're more likely to get away with a missing volatile.&amp;lt;/li&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/ul&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;P&gt;Since you mention to fault access the EEPROM that's the obvious code to look at first.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 18:47:14 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T18:47:14Z</dc:date>
    <item>
      <title>Release Build Rarely Boots</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Release-Build-Rarely-Boots/m-p/561551#M16318</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Randy Nuss on Thu Jun 20 21:37:06 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;I have a LPC4337-based project. &amp;nbsp;Debug builds always run from a power-on-reset. &amp;nbsp;However, a release build may only boot about 30% of the time, i.e. there is no evidence the code begins to run. &amp;nbsp;Something else, that may be telling, is I have run release builds in the debugger and I get a hard-fault exception when a read of an address within the EEPROM area is attempted -this never occurs when debugging a debug version.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;I believe all project properties are the same for both builds.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:47:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Release-Build-Rarely-Boots/m-p/561551#M16318</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:47:13Z</dc:date>
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    <item>
      <title>Re: Release Build Rarely Boots</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Release-Build-Rarely-Boots/m-p/561552#M16319</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by suckfish on Thu Jun 20 23:39:21 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;The first two things I'd check:&lt;/P&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;ul&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;li&amp;gt;Make sure you wait as appropriate for any config to take effect. There aren't many things that need that. An non-debug build will be faster and more likely to trip over any problems here.&amp;lt;/li&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;li&amp;gt;Make sure you use volatile accesses (or memory barriers) for all config registers. A debug build has less optimisation meaning that you're more likely to get away with a missing volatile.&amp;lt;/li&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&amp;lt;/ul&amp;gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;P&gt;Since you mention to fault access the EEPROM that's the obvious code to look at first.&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 18:47:14 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Release-Build-Rarely-Boots/m-p/561552#M16319</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T18:47:14Z</dc:date>
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