<?xml version="1.0" encoding="UTF-8"?>
<rss xmlns:content="http://purl.org/rss/1.0/modules/content/" xmlns:dc="http://purl.org/dc/elements/1.1/" xmlns:rdf="http://www.w3.org/1999/02/22-rdf-syntax-ns#" xmlns:taxo="http://purl.org/rss/1.0/modules/taxonomy/" version="2.0">
  <channel>
    <title>topic Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available? in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561484#M16303</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by peterhull90 on Fri Jun 21 06:14:32 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;Section &amp;lt;em&amp;gt;21.6.1 Memory map after any reset&amp;lt;/em&amp;gt; says '...The RAM usage is described later in this chapter...' but as far as I can see it is not.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 20:02:12 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T20:02:12Z</dc:date>
    <item>
      <title>Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561477#M16296</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by capiman on Sat Mar 09 03:18:44 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Here are again some topics for user manual of LPC800 (based on rev. 1.1 - 24 January 2013):&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1) There are 4 places on page 43 which mention GPREG4. But in table 42 on page 43, the GPREGx goes only from 0 to 3.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;2) Registers from Cortex-M0+ itself (e.g. SCB registers like SCR, but also NVIC register like ISER or ICER) &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;are not described in user manual of LPC800. Would it be possible to describe all registers &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;which are available in LPC800? Otherwise one must look into different sources (e.g. ARM website to collect the information needed)...&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;And there is still the unsecurity that register / functionality / certain bits are perhaps not even implemented in LPC800,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;because they are optional.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;3) Device ID register returns values which are not equal to values mentioned in user manual:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In real device i get:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LPC_SYSCON-&amp;gt;DEVICE_ID=1812202B&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;In user manual the following values are listed:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;(&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fdocs.lpcware.com%2Flpc800um%2FRegisterMaps%2Fsyscon%2Fr-DeviceIDregister.html%23d1e5037__CHDFFBBD" rel="nofollow" target="_blank"&gt;http://docs.lpcware.com/lpc800um/RegisterMaps/syscon/r-DeviceIDregister.html#d1e5037__CHDFFBBD&lt;/A&gt;&lt;SPAN&gt;)&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x0000 8100 = LPC810M021FN8&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x0000 8110 = LPC811M001FDH16&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x0000 8120 = LPC812M101FDH16&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x0000 8121 = LPC812M101FD20&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;0x0000 8122 = LPC812M101FDH20 (via ISP i get value 0x00008122)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;There is a "8122" in above number, perhaps only 16 bit and bit range wrong?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;BTW: My LPC812 chip has bootloader version 13.1 (according to FlashMagic)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;4) I would be happy if there is an AppNote for Deep Power Down mode for the Cortex-M0+ LPC800...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;5) Is there already an ErrataSheet for the LPC800? I have not found one...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;6) I am currently trying to use Deep Power Down mode and wake up via WKT. &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;This works once, but not a second time. Is there something known not to be working or needed a workaround?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;I write a separate entry, with more details inside.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:07 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561477#M16296</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:07Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561478#M16297</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by NXP_Paul on Wed Mar 13 11:22:48 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Thank you for bringing these issues to our attention.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;1. There are actually five GPREG registers.&amp;nbsp; This will be shown in the next revision of User Manual UM10601.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;2. Some of these registers will be included in the next revision of UM10601.&amp;nbsp; The registers in the NVIC will probably not be included in the next version, but they will be incorporated in future revisions.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;3. The DEVICE_ID register address in the UM10601 v1.1 is incorrect.&amp;nbsp; It should be 0x400483F8.&amp;nbsp; Again, you will find this value updated in the User Manual that should be available very soon.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;4. At this time, we don't have an app note discussing deep power-down.&amp;nbsp; However, we do have example code available for download at &lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fgfiles%2Fdevper%2Flpc800" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/gfiles/devper/lpc800&lt;/A&gt;&lt;SPAN&gt;, that includes wake from deep power-down.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;5. An errata sheet for the LPC8xx should be posted to lpcware.com very soon.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;6. Please review the example code, and let us know if you are still experiencing problem.&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:08 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561478#M16297</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:08Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561479#M16298</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by TheShed on Wed Mar 27 14:24:01 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Rev 1.2 User Manual available:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fdocuments%2Fuser_manual%2FUM10601.pdf" rel="nofollow" target="_blank"&gt;http://www.nxp.com/documents/user_manual/UM10601.pdf&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;and an Errata sheet:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fdocuments%2Ferrata_sheet%2FES_LPC81XM.pdf" rel="nofollow" target="_blank"&gt;http://www.nxp.com/documents/errata_sheet/ES_LPC81XM.pdf&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;-----------------------------------------------------------&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Errors in Rev 1.2:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1)&amp;nbsp; Fig 37: SPI Transfer_delay timing is a copy of Fig 36: Frame_delay timing.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;--&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;mike&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561479#M16298</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:09Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561480#M16299</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by NXP_Paul on Mon Apr 08 08:54:53 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;Mike&lt;BR /&gt;Thanks again for bringing this to our attention.&amp;nbsp; I have made a note of the problem, and it should hopefully be fixed in the next revision of the user's manual.&lt;BR /&gt;&lt;BR /&gt;Paul&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:09 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561480#M16299</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:09Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561481#M16300</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by kimmoli on Thu Jun 20 03:13:19 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;Following things also are strangely in UM10601 rev 1.2&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;ADDRDET description in table 161. I would keep descriptions, just swap "Enabled" and "Disabled".&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&lt;SPAN&gt;&amp;lt;span class="inline inline-left"&amp;gt;&amp;lt;img class="image image-preview " src="&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fsystem%2Ffiles%2Fimages%2Faddrdet.preview.png" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/system/files/images/addrdet.preview.png&lt;/A&gt;&lt;SPAN&gt;" border="0" alt="" title="" width="640" height="216" /&amp;gt;&amp;lt;/span&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Second is register address offsets for INTENSET and INTENCLR -registers in table 159&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&lt;SPAN&gt;&amp;lt;span class="inline inline-left"&amp;gt;&amp;lt;img class="image image-preview " src="&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fsystem%2Ffiles%2Fimages%2FINTENSET1.png" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/system/files/images/INTENSET1.png&lt;/A&gt;&lt;SPAN&gt;" border="0" alt="" title="" width="281" height="379" /&amp;gt;&amp;lt;/span&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;The registers INTENSET and INTENCLR are defined in struct in different order, and they work as expected. How ever in manual seems that they are in wrong place.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&lt;SPAN&gt;&amp;lt;span class="inline inline-left"&amp;gt;&amp;lt;img class="image image-preview " src="&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fsystem%2Ffiles%2Fimages%2FINTENSET2.png" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/system/files/images/INTENSET2.png&lt;/A&gt;&lt;SPAN&gt;" border="0" alt="" title="" width="378" height="241" /&amp;gt;&amp;lt;/span&amp;gt;&lt;/SPAN&gt;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Maybe this will be useful for someone&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;-kimmo&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:10 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561481#M16300</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:10Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561482#M16301</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by noahk on Thu Jun 20 17:46:00 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;Hi Kimmo,&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Looks like you are mistaking alphabetical ordering for register ordering. The tool you are using is listing the registers alphabetically and the order in the document is address order.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Noah&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561482#M16301</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:11Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561483#M16302</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by kimmoli on Fri Jun 21 03:19:10 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;Ok, my bad.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;The struct itself is according to the document. &lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&amp;nbsp;&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;&amp;lt;code&amp;gt;typedef struct&lt;BR /&gt;{&lt;BR /&gt;&amp;nbsp; __IO uint32_t&amp;nbsp; CFG;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; /* 0x00 */&lt;BR /&gt;&amp;nbsp; __IO uint32_t&amp;nbsp; CTRL;&lt;BR /&gt;&amp;nbsp; __IO uint32_t&amp;nbsp; STAT;&lt;BR /&gt;&amp;nbsp; __IO uint32_t&amp;nbsp; INTENSET;&lt;BR /&gt;&amp;nbsp; __O&amp;nbsp; uint32_t&amp;nbsp; INTENCLR;&amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; &amp;nbsp;&amp;nbsp;&amp;nbsp; /* 0x10 */&lt;BR /&gt;.....&lt;BR /&gt;&amp;lt;/code&amp;gt;&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:11 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561483#M16302</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:11Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561484#M16303</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by peterhull90 on Fri Jun 21 06:14:32 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;Section &amp;lt;em&amp;gt;21.6.1 Memory map after any reset&amp;lt;/em&amp;gt; says '...The RAM usage is described later in this chapter...' but as far as I can see it is not.&lt;/P&gt;&lt;BR /&gt;&lt;P&gt;Peter&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561484#M16303</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:12Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561485#M16304</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by peterhull90 on Fri Jun 21 06:17:10 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;P&gt;(duplicate)&lt;/P&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:12 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561485#M16304</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:12Z</dc:date>
    </item>
    <item>
      <title>Re: Some errors/remarks in/for User Manual LPC800 Rev. 1.1 - 24 January 2013, Request for AppNote, ErrataSheet available?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561486#M16305</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by peterhull90 on Fri Jun 21 06:17:59 MST 2013&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;(duplicate)&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 20:02:13 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/Some-errors-remarks-in-for-User-Manual-LPC800-Rev-1-1-24-January/m-p/561486#M16305</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T20:02:13Z</dc:date>
    </item>
  </channel>
</rss>

