Interrupt process - what happens inside? Cortex M0+

jeanvaljean — Thu, 25 Aug 2016 11:53:47 GMT

Gentlemen,

Where can I find the most detailed description of the interrupt process in my Cortex M0 controller?

I'd like to know, for example, if I need to clear the pending IT request, if I need to save the PC to the stack and later load it back, and so on.

The concrete controller is: LPC11E68.

The user manual details only the NVIC registers - necessary info, but not enough.

I use LPCXPresso 8.1.4 and Win7. (if it is significant in this case

Re: Interrupt process - what happens inside? Cortex M0+

lpcxpresso_supp — Thu, 25 Aug 2016 12:06:45 GMT

ARM provide lots of information themselves on NVIC iinterrupt controller in their Cortex-M0+ (the CPU inside the LPC11E68) and Architecture v6-M documentation (at ARM Information Center ).

Joseph Yiu's book is also a good source (The Definitive Guide to ARM® Cortex®-M0 and Cortex-M0+ Processors, Joseph Yiu, eBook - Amazon.com ) but if use your favourite search engine and look for "cortex-m nvic' or similar, there is lots of information around on the internet - for example:

Regards,

LPCXpresso Support

topic Re: Interrupt process - what happens inside? Cortex M0+ in LPC Microcontrollers

Interrupt process - what happens inside? Cortex M0+

Re: Interrupt process - what happens inside? Cortex M0+