Debug vs release

lpcware — Wed, 15 Jun 2016 19:59:23 GMT

Content originally posted in LPCWare by Vaque on Wed Mar 16 11:27:45 MST 2016
Hi all;

I have this code running on lpc824 max board. The code runs well on debug build but not on release build. Why is it?. It seems that fail the timer.

Thanks all.


#include "board.h"
#include "chip.h"

#define GPIO_PINRXD0 //MAX: D0
#define GPIO_PINTXD19 //MAX: D2
#define UART_BAUDRATE       115200

bool flag_MRT0 = false;

bool setPowerState(int power_state){
uint32_t response;
uint32_t cmdData[3];

cmdData[0] = 12;
cmdData[1] = power_state;
cmdData[2] = 12;

Chip_Clock_SetMainClockSource(SYSCTL_MAINCLKSRC_IRC);
SystemCoreClockUpdate();
__disable_irq();
LPC_ROM_API->pPWRD->set_power(cmdData, &response);
__enable_irq();

if(response)
return false;
return true;
}

static void setupMRT(uint8_t ch, MRT_MODE_T mode, uint32_t rate)
{
LPC_MRT_CH_T *pMRT;


/* Get pointer to timer selected by ch */
pMRT = Chip_MRT_GetRegPtr(ch);

/* Setup timer with rate based on MRT clock */

Chip_MRT_SetInterval(pMRT, (Chip_Clock_GetSystemClockRate() / rate) |
 MRT_INTVAL_LOAD);

/* Timer mode */
Chip_MRT_SetMode(pMRT, mode);

/* Clear pending interrupt and enable timer */
Chip_MRT_IntClear(pMRT);
Chip_MRT_SetEnabled(pMRT);
}

/**
 * @briefHandle interrupt from MRT
 * @returnNothing
 */
void MRT_IRQHandler(void)
{
uint32_t int_pend;

/* Get interrupt pending status for all timers  and clear it*/
int_pend = Chip_MRT_GetIntPending();
Chip_MRT_ClearIntPending(int_pend);
/* MRT 0 */
if (int_pend & (MRTn_INTFLAG(0))) {
flag_MRT0 = true;
}
}

static void blinkLEDCount(uint32_t count)
{
volatile uint32_t index;

/* Perform the requested number of times */
for (; count; --count) {
Board_LED_Toggle(0);
for (index = 0; index < 100000; ++index) {}/* delay */
Board_LED_Toggle(0);
for (index = 0; index < 100000; ++index) {}/* delay */
}
}

void UART_config_Init(){
/* Enable the clock to the Switch Matrix */
Chip_Clock_EnablePeriphClock(SYSCTL_CLOCK_SWM);

// Change pin to UARTn function
Chip_SWM_MovablePinAssign(SWM_U0_TXD_O, GPIO_PINTXD);
Chip_SWM_MovablePinAssign(SWM_U0_RXD_I, GPIO_PINRXD);

/* Disable the clock to the Switch Matrix */
Chip_Clock_DisablePeriphClock(SYSCTL_CLOCK_SWM);

/* Setup UARTn */
Chip_UART_Init(LPC_USART0);
Chip_UART_ConfigData(LPC_USART0, UART_CFG_DATALEN_8 | UART_CFG_PARITY_NONE | UART_CFG_STOPLEN_1);
Chip_Clock_SetUSARTNBaseClockRate((UART_BAUDRATE * 16), true);
Chip_UART_SetBaud(LPC_USART0, UART_BAUDRATE);
Chip_UART_Enable(LPC_USART0);
Chip_UART_TXEnable(LPC_USART0);
}

int main(void)
{
int mrtch;

/* Generic Initialization */
SystemCoreClockUpdate();
Board_Init();

/* Set power state */
/* if failure response don't proceed */
if (!setPowerState(PWR_CPU_PERFORMANCE)) {
while (1) {
blinkLEDCount(2);
}
}

/* Config and Init UART0 */
UART_config_Init();

Chip_MRT_Init();
for (mrtch = 0; mrtch < MRT_CHANNELS_NUM; mrtch++) {
Chip_MRT_SetDisabled(Chip_MRT_GetRegPtr(mrtch));
}
/* Enable the interrupt for the MRT */
NVIC_EnableIRQ(MRT_IRQn);

flag_MRT0 = false;
setupMRT(0, MRT_MODE_ONESHOT, 500);
while(!flag_MRT0) __WFI();
Chip_UART_SendBlocking(LPC_USART0, "go\r\n", 4);
while ( 1 ) {

}
}

Re: Debug vs release

lpcware — Wed, 15 Jun 2016 19:59:24 GMT

Content originally posted in LPCWare by starblue on Wed Mar 16 16:05:38 MST 2016
Try declaring flag_MRT0 as volatile.

Re: Debug vs release

lpcware — Wed, 15 Jun 2016 19:59:25 GMT

Content originally posted in LPCWare by R2D2 on Wed Mar 16 23:10:37 MST 2016

Quote: Vaque
Why is it?

FAQ: 'Optimized code fails to execute correctly'

https://www.lpcware.com/content/faq/lpcxpresso/compiler-optimization

Re: Debug vs release

lpcware — Wed, 15 Jun 2016 19:59:26 GMT

Content originally posted in LPCWare by Vaque on Thu Mar 17 04:13:15 MST 2016
that's fast!

It's running well on release build with 'volatile'.
Thanks so much to both of you.

Regards.

Re: Debug vs release

lpcware — Sun, 19 Jun 2016 01:05:22 GMT

bump

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Debug vs release

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Re: Debug vs release