LPC MicrocontrollersのトピックRe: LPC4357 Dual Core speed Question

LPC4357 Dual Core speed Question

lpcware — Wed, 15 Jun 2016 18:43:43 GMT

Content originally posted in LPCWare by acelink1 on Wed Feb 05 19:34:19 MST 2014
Hi Guys, I'm new to the LPC4357 Dual Core MPU. I'm receiving my NXP Project board this week :) YAY, So Happy :)

Anyway, I was wondering, if I have a program running in Flash Mem A assigned to the Cortex M4 CPU
and a program running in Flash Mem B assigned to the Cortex M0 CPU, do both CPU's run at the full 204Mhz speed?

Sorry if that sounds a little daft but that's how we learn.

Thanks guys

Pete :)

Re: LPC4357 Dual Core speed Question

lpcware — Wed, 15 Jun 2016 18:43:44 GMT

Content originally posted in LPCWare by starblue on Thu Feb 06 02:14:36 MST 2014
According to the description (3.3.3 on page 26 of the user manual) and the AHB multilayer matrix (Fig. 11 on page 35) they should be able to access the two memories in parallel, with separate flash accelerators for buffering (but I haven't tried it).

That said, if you want full speed you should use internal RAM. A flash access needs 10 cycles at 204 MHz (see FLASHCFGA/B registers), while I think the SRAM needs only one cycle (but I can't find that in the user manual). In my experience that results in an overall slowdown by about a factor of three of flash vs SRAM.

Re: LPC4357 Dual Core speed Question

lpcware — Wed, 15 Jun 2016 18:43:44 GMT

Content originally posted in LPCWare by acelink1 on Thu Feb 06 16:02:43 MST 2014
Thanks starblue :)