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    <title>topic Re: How can i enable m0+ core on NXP LPC54102 microcontroller? in LPC Microcontrollers</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558597#M15641</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Thu Apr 02 08:26:26 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi NXP Technical Support,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Can i enable m0+ core using DMA interrupt?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;The steps i am using to enable the core are as follows:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;1.set the DMA clock in AHBCLKCTRL0 register.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;2.Set the DMA interrupt in NVIC( by using ISER0 register)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;3. Set the DMA interrupt in Start enable register 0 (STARTERP0)&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;4.Generate the interrupt using interrupt set pending register, by writing the mask that changes the DMA interrupt state to pending (ISPR0).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Can you kindly confirm that am i using the right steps? Am i on the right path?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for the help.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 19:56:50 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T19:56:50Z</dc:date>
    <item>
      <title>How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558575#M15619</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Thu Mar 26 12:49:29 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I want to run a bare metal application on m0+ core of NXP LPC54102, but i don't know how can i wake up the core from sleep? What registers should i look into to wake up the m0+ core? Since m0+ core can only be enabled by m4 core so, how can i use m4 core to wake up m0+ core?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558575#M15619</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:38Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558576#M15620</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lpcxpresso-support on Thu Mar 26 13:07:03 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;If you are using LPCXpresso, you can create a 'multicore' project for the M4 and M0 cores and the startup code (optionally) starts the m0 core(*). Look in the startup.c and boot_multicore_slave.[ch] files.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:38 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558576#M15620</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:38Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558577#M15621</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by lpcxpresso-support on Thu Mar 26 13:17:19 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;And for more details, read the FAQ ...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fcontent%2Ffaq%2Flpcxpresso%2Flpc541xx-multicore-apps" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/content/faq/lpcxpresso/lpc541xx-multicore-apps&lt;/A&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;LPCXpresso Support&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558577#M15621</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:39Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558578#M15622</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Fri Mar 27 05:30:04 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Actually i want to write the initialization code myself that would wake up the m0+ core. That is why i am not using LPCXpresso. So any suggestions on how can i write that?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:39 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558578#M15622</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:39Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558579#M15623</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by nerd herd on Fri Mar 27 07:54:00 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi waleed,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;You can take a look at the Keil MDK LPCOpen multicore blinky example as a reference (the keil .s startup file has the assembly code you are interested in).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Essentially what happens is that there is a register that indicates which core is "Master". Both cores will initially bootup and check if they are master (reset value of this register puts the Cortex-M4 as master). The Cortex-M0 core will find that he is the slave and will immediately go to sleep. The Cortex-M4 core will find that he is master and will proceed to setup registers as he would normally.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Link to LPCOpen:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.lpcware.com%2Fcontent%2Fnxpfile%2Flpcopen-software-development-platform-lpc5410x-packages" rel="nofollow" target="_blank"&gt;http://www.lpcware.com/content/nxpfile/lpcopen-software-development-platform-lpc5410x-packages&lt;/A&gt;&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:40 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558579#M15623</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:40Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558580#M15624</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by starblue on Fri Mar 27 08:35:06 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;IMHO this should be documented in the user manual, but I can't find anything there.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558580#M15624</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:41Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558581#M15625</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by nerd herd on Fri Mar 27 10:25:00 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi starblue,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;We have an update for the UM coming out of the pipeline in the next week or so. Stay tuned! :)&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:41 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558581#M15625</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:41Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558582#M15626</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Fri Mar 27 12:50:15 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Is it possible that you might provide me with the initialization code to wake up the m0+ core?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558582#M15626</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:42Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558583#M15627</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Fri Mar 27 13:23:09 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;In your last comment you mentioned that "(the keil .s startup file has the assembly code you are interested in)." I was able to find some startup files e.g cr_startup_lpc5410x-m0 and cr_startup_lpc5410x, but these files are not ".s files" they are ".c files".&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I just want to confirm that when you said .s startup files, which files are you talking about?&amp;nbsp; If you can give an example of such file by exact name it will be great.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:42 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558583#M15627</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:42Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558584#M15628</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Sun Mar 29 10:45:01 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;This is what i think i need to do to enable the m0+ core.Kindly correct me if i am wrong:&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt; &lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;1. Use RTC alarm since time-out can wake up the part from any of the low power&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;modes, including Deep power-down.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;2. Configure the RTC as follows:&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;• Use the AHBCLKCTRL0 register (Table 51) to enable the clock to the RTC register&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;interface and peripheral clock.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;• For RTC software reset use the RTC CTRL register. See Table 276.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;• The RTC provides an interrupt to NVIC slot #29 for the RTC_WAKE and&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;RTC_ALARM functions.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;• The RTC oscillator is always running, and therefore the 32 kHz output is always&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;available to be enabled for syscon clock generation (see Table 65). Once enabled, the&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;32 kHz clock can be selected for the system clock or be observed through the&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;CLKOUT pin. The 1 Hz output is enabled in the RTC CTRL register (RTC_EN bit).&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Once the 1 Hz output is enabled, the 1 kHz output for the high-resolution wake-up&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;timer can be enabled.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;• Enable the RTC oscillator that provides the RTC’s 1 Hz and 1 kHz clocks in the&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;syscon block. See Table 65&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;3. When the RTC timer value will reach a match value, an&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;interrupt will be raised. The alarm interrupt will wake up the part from any low power&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;mode if enabled.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558584#M15628</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:43Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558585#M15629</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by TheFallGuy on Sun Mar 29 12:40:53 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Keil provide assembler startup files. Nxp provide C startup files in LPCXpresso. It is much easier to understand the c startup files.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Enabling the m0+ is just writing to a couple of registers, just look in and read the startup files. No need to use the RTC - that is far too complicated for a very simple task.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;In fact why not just use LPCXpresso. It is free and uses Gcc. Why use anything else?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:43 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558585#M15629</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:43Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558586#M15630</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Mon Mar 30 06:17:04 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi TheFallGuy,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for the help...&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Can you kindly provide me the name of the startup files which contain the code to enable m0+ core? it will be really helpful.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Actually i want to write the initialization code myself that is why i am not using LPCXpresso.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558586#M15630</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:44Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558587#M15631</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by nerd herd on Mon Mar 30 08:54:33 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi waleed,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If your high level goal is to start with a project that successfully initializes the Cortex-M0+ core, please check out the multicore blinky example, whether in Keil MDK or LPCXpresso. This example does exactly what you need -- Cortex-M4 core takes the Cortex-M0+ core out of reset, and then both cores wake each other up and take turns blinking an LED. This can serve as the base of your application.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:44 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558587#M15631</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:44Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558588#M15632</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Tue Mar 31 04:14:09 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi NXP Technical Support,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Thanks for the help, i will take a look at it.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:45 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558588#M15632</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:45Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558589#M15633</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Wed Apr 01 07:05:43 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi NXP Technical Support,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I think i have enabled m0+ core but, i don't know how i can know that.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Can you kindly explain that, "is there a way to determine that m0+ core has been enabled". What i am trying to ask is that, are there any registers which i can read to know which cores are enabled?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Your help is much needed and appreciated. :) &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Muhammad Waleed &lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558589#M15633</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:46Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558590#M15634</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by nerd herd on Wed Apr 01 10:05:09 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi waleed,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;If by enabled you mean that the Cortex-M0+ core is executing your own code, I would recommend having the Cortex-M0+ core toggle a pin that you observe on an oscilloscope or LED. Are you using a custom board or LPCXpresso evaluation board?&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:46 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558590#M15634</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:46Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558591#M15635</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by starblue on Thu Apr 02 00:50:08 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;You could take a look at AN11608 "Heart-Rate Monitor" page 7, until the updated user manual appears.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558591#M15635</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:47Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558592#M15636</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by TheFallGuy on Thu Apr 02 02:03:10 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I think you mean AN11609?&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.nxp.com%2Fdocuments%2Fapplication_note%2FAN11609.zip" rel="nofollow" target="_blank"&gt;http://www.nxp.com/documents/application_note/AN11609.zip&lt;/A&gt;&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:47 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558592#M15636</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:47Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558593#M15637</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by starblue on Thu Apr 02 03:05:33 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;No, I mean AN11608.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;As far as I can tell the information in AN11609 is also in the currently available user manual (which doesn't mean you shouldn't read it anyway), while AN11608 page 7 documents a register CPUCTRL that is not yet in the user manual.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558593#M15637</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:48Z</dc:date>
    </item>
    <item>
      <title>Re: How can i enable m0+ core on NXP LPC54102 microcontroller?</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558594#M15638</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by waleed on Thu Apr 02 04:07:38 MST 2015&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;I am using LPCXpresso evaluation board.&lt;/SPAN&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 19:56:48 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/How-can-i-enable-m0-core-on-NXP-LPC54102-microcontroller/m-p/558594#M15638</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T19:56:48Z</dc:date>
    </item>
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