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    <title>LPC MicrocontrollersのトピックRe: 1778 NVIC - Undocumented IRQ</title>
    <link>https://community.nxp.com/t5/LPC-Microcontrollers/1778-NVIC-Undocumented-IRQ/m-p/516178#M1535</link>
    <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MikeSimmonds on Tue Oct 02 08:18:56 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Actually, SVC will not serve in my case; I am driving a custom display (not an LCD).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;My display refresh runs 60*8 = 480 times a second.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This is high priority and only issues a strobe clock in hardware.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;It also issues a software interrupt (quite low priority)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;for a routine to load up the next raster row (1 of 8 rows)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if this is a multiple of 8 call, it also issues a software interrupt (low -- lower than the above -- priority) to generate the next frame buffer.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I was hoping to use (LPC1778) reserved Irq 13 and undocumented Irq 41.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Failing that, as I have no I2C, I would hijack two of these.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Other enabled interrupts are handling UARTS, Count down timers, Ethernet, Systick (up time counter) etc. etc.&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
    <pubDate>Wed, 15 Jun 2016 17:23:27 GMT</pubDate>
    <dc:creator>lpcware</dc:creator>
    <dc:date>2016-06-15T17:23:27Z</dc:date>
    <item>
      <title>1778 NVIC - Undocumented IRQ</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/1778-NVIC-Undocumented-IRQ/m-p/516176#M1533</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MikeSimmonds on Mon Sep 24 11:51:04 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Investigation on a 1778 device (LQFP-208) has revealed that the NVIC implements 42 IRQs.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Only 41 are documented Watchdog to EEPROM.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Does anyone know what the extra one is for, and if it would be safe&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;to use it as a software triggered interrupt?&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Cheers, Mike&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:23:25 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/1778-NVIC-Undocumented-IRQ/m-p/516176#M1533</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:23:25Z</dc:date>
    </item>
    <item>
      <title>Re: 1778 NVIC - Undocumented IRQ</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/1778-NVIC-Undocumented-IRQ/m-p/516177#M1534</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by Daniel Widyanto on Thu Sep 27 00:59:08 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Hi Mike,&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;If you want to have software triggered interrupt, then it's the best to take advantage of SVCall exception. See the ARM Cortex-M3 Technical Reference Manual here (&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Finfocenter.arm.com%2Fhelp%2Ftopic%2Fcom.arm.doc.ddi0337e%2FDDI0337E_cortex_m3_r1p1_trm.pdf" rel="nofollow" target="_blank"&gt;http://infocenter.arm.com/help/topic/com.arm.doc.ddi0337e/DDI0337E_cortex_m3_r1p1_trm.pdf&lt;/A&gt;&lt;SPAN&gt;). &lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Your software based code will be portable to any ARM Cortex-M (including ARM Cortex-M0, M1, M3 and M4), and independent from any ARM vendor (NXP, STM32, AT91SAM, etc). &lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;&lt;SPAN&gt;If you're looking for real implementation, check out the FreeRTOS project (&lt;/SPAN&gt;&lt;A class="jive-link-external-small" href="https://community.nxp.com/external-link.jspa?url=http%3A%2F%2Fwww.freertos.org" rel="nofollow" target="_blank"&gt;http://www.freertos.org&lt;/A&gt;&lt;SPAN&gt;). The FreeRTOS is using SVCall to generate software based interrupt, to switch between the kernel and user mode.&lt;/SPAN&gt;&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Regards,&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;-daniel&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:23:26 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/1778-NVIC-Undocumented-IRQ/m-p/516177#M1534</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:23:26Z</dc:date>
    </item>
    <item>
      <title>Re: 1778 NVIC - Undocumented IRQ</title>
      <link>https://community.nxp.com/t5/LPC-Microcontrollers/1778-NVIC-Undocumented-IRQ/m-p/516178#M1535</link>
      <description>&lt;HTML&gt;&lt;HEAD&gt;&lt;/HEAD&gt;&lt;BODY&gt;&lt;STRONG&gt;Content originally posted in LPCWare by MikeSimmonds on Tue Oct 02 08:18:56 MST 2012&lt;/STRONG&gt;&lt;BR /&gt;&lt;SPAN&gt;Actually, SVC will not serve in my case; I am driving a custom display (not an LCD).&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;My display refresh runs 60*8 = 480 times a second.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;This is high priority and only issues a strobe clock in hardware.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;It also issues a software interrupt (quite low priority)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;for a routine to load up the next raster row (1 of 8 rows)&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;if this is a multiple of 8 call, it also issues a software interrupt (low -- lower than the above -- priority) to generate the next frame buffer.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;I was hoping to use (LPC1778) reserved Irq 13 and undocumented Irq 41.&lt;/SPAN&gt;&lt;BR /&gt;&lt;SPAN&gt;Failing that, as I have no I2C, I would hijack two of these.&lt;/SPAN&gt;&lt;BR /&gt;&lt;BR /&gt;&lt;SPAN&gt;Other enabled interrupts are handling UARTS, Count down timers, Ethernet, Systick (up time counter) etc. etc.&lt;/SPAN&gt;&lt;BR /&gt;&lt;/BODY&gt;&lt;/HTML&gt;</description>
      <pubDate>Wed, 15 Jun 2016 17:23:27 GMT</pubDate>
      <guid>https://community.nxp.com/t5/LPC-Microcontrollers/1778-NVIC-Undocumented-IRQ/m-p/516178#M1535</guid>
      <dc:creator>lpcware</dc:creator>
      <dc:date>2016-06-15T17:23:27Z</dc:date>
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